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([2a01:e0a:982:cbb0:aad5:8d14:a22f:2e8b]) by smtp.gmail.com with ESMTPSA id d16-20020a5d6dd0000000b0022584c82c80sm386384wrz.19.2022.11.17.00.54.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 17 Nov 2022 00:54:41 -0800 (PST) Message-ID: <098b923b-ff46-5ef5-9c21-19c974c9274f@linaro.org> Date: Thu, 17 Nov 2022 09:54:40 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.3 From: Neil Armstrong Subject: Re: [PATCH 3/3] spi: meson-spicc: Lower CS between bursts Content-Language: en-US To: Carlo Caione , Kamlesh Gurudasani , Mark Brown , Jerome Brunet , David Airlie , Martin Blumenstingl , Kevin Hilman , Daniel Vetter Cc: linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, dri-devel@lists.freedesktop.org References: <20221116-s905x_spi_ili9486-v1-0-630401cb62d5@baylibre.com> <20221116-s905x_spi_ili9486-v1-3-630401cb62d5@baylibre.com> Organization: Linaro Developer Services In-Reply-To: <20221116-s905x_spi_ili9486-v1-3-630401cb62d5@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221117_005447_770434_9C606DB9 X-CRM114-Status: GOOD ( 19.52 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: neil.armstrong@linaro.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Hi, On 17/11/2022 09:47, Carlo Caione wrote: > On some hardware (reproduced on S905X) when a large payload is > transmitted over SPI in bursts at the end of each burst, the clock line > briefly fluctuates creating spurious clock transitions that are being > recognised by the connected device as a genuine pulses, creating an > offset in the data being transmitted. > > Lower the GPIO CS between bursts to avoid the clock being interpreted as > valid. I'm afraid this will actually break SPI NORs for example where CS actually splits transactions. Isn't Amjad change enough ? The CLK pull-up should avoid this. If it's not the case, then it's an HW issue and the CLK line pull-up is too weak and an external pull should then be added. > > Signed-off-by: Carlo Caione > --- > drivers/spi/spi-meson-spicc.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/spi/spi-meson-spicc.c b/drivers/spi/spi-meson-spicc.c > index d47f2623a60f..af8d74b53519 100644 > --- a/drivers/spi/spi-meson-spicc.c > +++ b/drivers/spi/spi-meson-spicc.c > @@ -291,6 +291,10 @@ static inline void meson_spicc_setup_burst(struct meson_spicc_device *spicc) > static irqreturn_t meson_spicc_irq(int irq, void *data) > { > struct meson_spicc_device *spicc = (void *) data; > + struct spi_device *spi_dev; > + > + spi_dev = spicc->message->spi; > + gpiod_set_value(spi_dev->cs_gpiod, 0); > > writel_bits_relaxed(SPICC_TC, SPICC_TC, spicc->base + SPICC_STATREG); > > @@ -309,6 +313,8 @@ static irqreturn_t meson_spicc_irq(int irq, void *data) > /* Setup burst */ > meson_spicc_setup_burst(spicc); > > + gpiod_set_value(spi_dev->cs_gpiod, 1); > + > /* Start burst */ > writel_bits_relaxed(SPICC_XCH, SPICC_XCH, spicc->base + SPICC_CONREG); > > _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic