From: jbrunet@baylibre.com (Jerome Brunet)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH] clk: meson: axg: fix the od shift of the sys_pll
Date: Tue, 30 Jan 2018 20:12:06 +0100 [thread overview]
Message-ID: <1517339526.3153.10.camel@baylibre.com> (raw)
In-Reply-To: <20180119020926.246887-1-yixun.lan@amlogic.com>
On Fri, 2018-01-19 at 10:09 +0800, Yixun Lan wrote:
> According to datasheet, the od shift of sys_pll is 16,
> fix the typo which introduced at previous commit.
>
> Fixes: 78b4af312f91 ('clk: meson-axg: add clock controller drivers')
> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Applied to clk-meson next/drivers after fixing the commit message a bit
Thx
Jerome
prev parent reply other threads:[~2018-01-30 19:12 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-19 2:09 Yixun Lan
2018-01-22 11:01 ` Jerome Brunet
2018-01-30 19:12 ` Jerome Brunet [this message]
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