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[82.243.161.21]) by smtp.gmail.com with ESMTPSA id f26sm25790278wmj.11.2020.05.11.02.28.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 May 2020 02:28:47 -0700 (PDT) User-agent: mu4e 1.3.3; emacs 26.3 From: Jerome Brunet To: Stephen Boyd Subject: [GIT PULL] clk: meson: updates for v5.8 Date: Mon, 11 May 2020 11:28:45 +0200 Message-ID: <1j3686g6r6.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200511_022849_886944_04AA5624 X-CRM114-Status: UNSURE ( 6.91 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Hilman , linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Hi Stephen, Here are the amlogic clock updates for v5.8. Nothing fancy, please pull. Cheers The following changes since commit 8f3d9f354286745c751374f5f1fcafee6b3f3136: Linux 5.7-rc1 (2020-04-12 12:35:55 -0700) are available in the Git repository at: git://github.com/BayLibre/clk-meson.git tags/clk-meson-v5.8-1 for you to fetch changes up to a29ae8600d50ece1856b062a39ed296b8b952259: clk: meson: meson8b: Don't rely on u-boot to init all GP_PLL registers (2020-05-02 01:53:32 +0200) ---------------------------------------------------------------- Amlogic clock updates for v5.8: * Meson8b: Updates and fixup HDMI and video clocks * Meson8b: Fixup reset polarity * Meson gx and g12: fix GPU glitch free mux switch ---------------------------------------------------------------- Martin Blumenstingl (9): clk: meson8b: export the HDMI system clock clk: meson: meson8b: make the hdmi_sys clock tree mutable clk: meson: gxbb: Prepare the GPU clock tree to change at runtime clk: meson: g12a: Prepare the GPU clock tree to change at runtime clk: meson: meson8b: Fix the first parent of vid_pll_in_sel clk: meson: meson8b: Fix the polarity of the RESET_N lines clk: meson: meson8b: Fix the vclk_div{1, 2, 4, 6, 12}_en gate bits clk: meson: meson8b: Make the CCF use the glitch-free VPU mux clk: meson: meson8b: Don't rely on u-boot to init all GP_PLL registers drivers/clk/meson/g12a.c | 30 +++++--- drivers/clk/meson/gxbb.c | 40 ++++++----- drivers/clk/meson/meson8b.c | 120 ++++++++++++++++++++++--------- drivers/clk/meson/meson8b.h | 5 +- include/dt-bindings/clock/meson8b-clkc.h | 1 + 5 files changed, 134 insertions(+), 62 deletions(-) _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic