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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id 133sm7971860wmb.24.2021.10.21.05.19.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Oct 2021 05:19:53 -0700 (PDT) References: <20211016145939.15643-1-martin.blumenstingl@googlemail.com> <1j5ytuvdmw.fsf@starbuckisacylon.baylibre.com> <1jmtn6tu99.fsf@starbuckisacylon.baylibre.com> User-agent: mu4e 1.6.7; emacs 27.1 From: Jerome Brunet To: Martin Blumenstingl Cc: linux-amlogic@lists.infradead.org, Neil Armstrong , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Christian Hewitt Subject: Re: [PATCH] clk: meson: gxbb: Add the spread spectrum bit for MPLL0 on GXBB Date: Thu, 21 Oct 2021 14:18:01 +0200 In-reply-to: Message-ID: <1jfssumuxi.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211021_051956_890687_E02C33AF X-CRM114-Status: GOOD ( 23.81 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On Wed 20 Oct 2021 at 20:16, Martin Blumenstingl wrote: > Hi Jerome, > > On Mon, Oct 18, 2021 at 2:03 PM Jerome Brunet wrote: > [...] >> > The difference here is BIT(14). un-setting BIT(14) (documented as >> > EN_DDS0) did not change anything according to Christian's test. >> > That also means that SDM, SDM_EN and N2 have the expected values. >> > I manually did the maths: >> > (2000000000Hz * 16384) / ((16384 * 6) + 12808) = 294909640.7Hz >> > which matches what clk_summary sees: >> > 294909641Hz >> >> ... and (2000000000Hz * 16384) / ((16384 * 6) = 333MHz which is fairly close >> to what you get w/o flipping the bit > This is actually a great hint. So far MPLL clocks have "just worked" > for me and I didn't have to work with this. > With your explanation it makes sense that SDM_EN makes the hardware > use or ignore the SDM value. > > [...] >> For example yes. I am asking check a bit more what this bit does and >> what it does not: >> - I need confirmation whether or not it does spread spectrum. Yes this >> needs to be observed on a SoC pin, like MCLK with a fairly low divider >> to the averaging effect which could partially mask spread spectrum. > I did some more tests with Christian. It turns out that on GXBB > HHI_MPLL_CNTL7[15] has no impact on the rate seen by meson-clk-msr. > On the other hand, HHI_MPLL_CNTL[25] makes MPLL0 use or ignore the SDM > value (again, verified through meson-clk-msr). > >> - Get an idea what it actually does. The 2 calculations above are an >> hint. (Spread spectrum does not change the rate mean value) > Indeed! > My conclusion is that on GXBB: > 1) HHI_MPLL_CNTL[25] doesn't control the spread spectrum setting of > MPLL0 - just like you thought > 2) HHI_MPLL_CNTL[25] is actually SDM_EN (and HHI_MPLL_CNTL7[15] > doesn't seem to have any impact on MPLL0's output rate) > > Please let me know if there's anything else we can test. > Else I'll send a patch for making HHI_MPLL_CNTL[25] the SDM_EN bit of > MPLL0 on GXBB. Fine by me if you are confident that HHI_MPLL_CNTL7[15] has indeed no effect. Maybe add a comment about this oddity. > > > Best regards, > Martin _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic