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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id m11sm1993303wrn.11.2020.08.28.06.52.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Aug 2020 06:52:25 -0700 (PDT) References: User-agent: mu4e 1.3.3; emacs 26.3 From: Jerome Brunet To: Stefan Agner , narmstrong@baylibre.com Subject: Re: [PATCH] clk: meson: g12a: mark fclk_div2 as critical In-reply-to: Date: Fri, 28 Aug 2020 15:52:24 +0200 Message-ID: <1jft867u93.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200828_095227_678336_E2350EA8 X-CRM114-Status: GOOD ( 18.89 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sboyd@kernel.org, khilman@baylibre.com, mturquette@baylibre.com, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Marek Szyprowski Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On Thu 27 Aug 2020 at 23:43, Stefan Agner wrote: > On Amlogic Meson G12b platform, similar to fclk_div3, the fclk_div2 > seems to be necessary for the system to operate correctly as well. > > Typically, the clock also gets chosen by the eMMC peripheral. This > probably masked the problem so far. However, when booting from a SD > card the clock seems to get disabled which leads to a system freeze. > > Let's mark this clock as critical, fixing boot from SD card on G12b > platforms. > > Signed-off-by: Stefan Agner > --- > drivers/clk/meson/g12a.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c > index fad616cac01e..2214b974f748 100644 > --- a/drivers/clk/meson/g12a.c > +++ b/drivers/clk/meson/g12a.c > @@ -298,6 +298,7 @@ static struct clk_regmap g12a_fclk_div2 = { > &g12a_fclk_div2_div.hw > }, > .num_parents = 1, > + .flags = CLK_IS_CRITICAL, > }, > }; Hi Stephan, Thanks for reporting and fixing this. That's unfortunately the things we have to find the "hard way" Could you please: 1) add a Fixes tag to commit description so stable can pick it up Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller") 2) Add a comment similar to the comment block of fdiv3 so we are pretty clear why this clock needs to be critical and don't have to dig in history find out. Also please Cc Marek Szyprowski ... you guys apparently found this at them time :) Thanks _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic