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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id r28sm14154720wrr.20.2020.07.17.02.55.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jul 2020 02:55:52 -0700 (PDT) User-agent: mu4e 1.3.3; emacs 26.3 From: Jerome Brunet To: Stephen Boyd Subject: [GIT PULL] clk: meson: updates for v5.9 Date: Fri, 17 Jul 2020 11:55:51 +0200 Message-ID: <1jr1tapis8.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200717_055555_312129_C62800FA X-CRM114-Status: UNSURE ( 5.84 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, Neil Armstrong , linux-clk@vger.kernel.org, Kevin Hilman Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Hi Stephen, Here are the amlogic clock changes for v5.9 Business as usual - Please pull. Cheers Jerome The following changes since commit b3a9e3b9622ae10064826dccb4f7a52bd88c7407: Linux 5.8-rc1 (2020-06-14 12:45:04 -0700) are available in the Git repository at: git://github.com/BayLibre/clk-meson.git tags/clk-meson-v5.9-1 for you to fetch changes up to 2568528f55356a2f20f80a18244d3e235cbd2cab: clk: meson: meson8b: add the vclk2_en gate clock (2020-07-09 11:37:44 +0200) ---------------------------------------------------------------- Amlogic clock updates for v5.9: * g12: add neural network accelerator clock sources * meson8: remove critical flag for main PLL divider * meson8: add video decoder clock gates ---------------------------------------------------------------- Dmitry Shmidt (2): dt-bindings: clk: g12a-clkc: Add NNA CLK Source clock IDs clk: meson: g12a: Add support for NNA CLK source clocks Martin Blumenstingl (3): clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2 clk: meson: meson8b: add the vclk_en gate clock clk: meson: meson8b: add the vclk2_en gate clock drivers/clk/meson/g12a.c | 119 ++++++++++++++++++++++++++++++++++ drivers/clk/meson/g12a.h | 7 +- drivers/clk/meson/meson8b.c | 67 ++++++++++++++----- drivers/clk/meson/meson8b.h | 4 +- include/dt-bindings/clock/g12a-clkc.h | 2 + 5 files changed, 180 insertions(+), 19 deletions(-) _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic