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[82.243.161.21]) by smtp.gmail.com with ESMTPSA id z8sm28289847wrr.40.2020.04.29.04.44.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Apr 2020 04:44:52 -0700 (PDT) References: <20200417184127.1319871-1-martin.blumenstingl@googlemail.com> User-agent: mu4e 1.3.3; emacs 26.3 From: Jerome Brunet To: Martin Blumenstingl , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org Subject: Re: [PATCH v2 0/4] clk: meson8b: updates for video clocks / resets In-reply-to: <20200417184127.1319871-1-martin.blumenstingl@googlemail.com> Date: Wed, 29 Apr 2020 13:44:51 +0200 Message-ID: <1jr1w6iki4.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200429_044455_435780_CAF2B44A X-CRM114-Status: GOOD ( 15.23 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sboyd@kernel.org, mturquette@baylibre.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, narmstrong@baylibre.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On Fri 17 Apr 2020 at 20:41, Martin Blumenstingl wrote: > This is the first batch of fixes and updates for the Meson8/8b/8m2 > clock controller driver. > > The first patch fixes the video clock hierarchy. Special thanks to > Neil for providing a lot of details about the video clock tree! > > The second and third came up while testing video output on my EC-100 > (Endless Mini). This board is special because u-boot does not enable > the video outputs like most other u-boot versions do. However, this > is very useful for development because it shows (the hard way ;)) > where the existing code is buggy. > > The last patch is a small improvement for the VPU clock so we > utilize the glitch-free mux (on SoCs which support it) and avoid > problems by changing the "live" clock tree at runtime (with the mali > clock this resulted in system hangs/freezes). > > In my opinion all of these patches - including the fixes - can go to > "next" because the relevant clock trees are still read-only. > > > Changes since v1 at [0]: > - updated the description in patch #1 to clarify that (it seems that) > there is no fixed pre-multiplier for the HDMI PLL (like on GXL for > example). Spotted by Jerome - thanks! > - simplified the logic for the active_low resets in patch #2 by > shortening the if ... else. Thanks to Jerome for the suggestion. > > > [0] https://patchwork.kernel.org/cover/11489079/ > > > Martin Blumenstingl (4): > clk: meson: meson8b: Fix the first parent of vid_pll_in_sel > clk: meson: meson8b: Fix the polarity of the RESET_N lines > clk: meson: meson8b: Fix the vclk_div{1,2,4,6,12}_en gate bits > clk: meson: meson8b: Make the CCF use the glitch-free VPU mux Applied, Thx > > drivers/clk/meson/meson8b.c | 105 +++++++++++++++++++++++++----------- > 1 file changed, 73 insertions(+), 32 deletions(-) _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic