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[82.65.169.74]) by smtp.gmail.com with ESMTPSA id b5sm1670403wrr.19.2022.01.06.02.44.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Jan 2022 02:44:06 -0800 (PST) References: <20220106054724.18637-1-xianwei.zhao@amlogic.com> User-agent: mu4e 1.6.10; emacs 27.1 From: Jerome Brunet To: Xianwei Zhao , linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Rob Herring Subject: Re: [PATCH V3] arm64: dts: add support for S4 based Amlogic AQ222 Date: Thu, 06 Jan 2022 11:41:21 +0100 In-reply-to: <20220106054724.18637-1-xianwei.zhao@amlogic.com> Message-ID: <1jv8yx5ekq.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220106_024408_619503_18BF109E X-CRM114-Status: GOOD ( 16.98 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On Thu 06 Jan 2022 at 13:47, Xianwei Zhao wrote: > Add basic support for the Amlogic S4 based Amlogic AQ222 board: > which describe components as follows: CPU, GIC, IRQ, Timer, UART. > It's capable of booting up into the serial console. > > Signed-off-by: Xianwei Zhao > --- > V2 -> V3: add of dts board compatible family > V1 -> V2: cleaned up coding style, modify CPU affinity of timer interrups, > and modify GIC reg defintions. > --- > arch/arm64/boot/dts/amlogic/Makefile | 1 + > .../dts/amlogic/meson-s4-s805x2-aq222.dts | 30 ++++++ > arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 99 +++++++++++++++++++ > 3 files changed, 130 insertions(+) > create mode 100644 arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts > create mode 100644 arch/arm64/boot/dts/amlogic/meson-s4.dtsi > > diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile > index 5148cd9e5146..faea74a45994 100644 > --- a/arch/arm64/boot/dts/amlogic/Makefile > +++ b/arch/arm64/boot/dts/amlogic/Makefile > @@ -57,3 +57,4 @@ dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-c4.dtb > dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-hc4.dtb > dtb-$(CONFIG_ARCH_MESON) += meson-sm1-sei610.dtb > dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb > +dtb-$(CONFIG_ARCH_MESON) += meson-s4-s805x2-aq222.dtb > diff --git a/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts b/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts > new file mode 100644 > index 000000000000..a942d7e06d6e > --- /dev/null > +++ b/arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts > @@ -0,0 +1,30 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2021 Amlogic, Inc. All rights reserved. > + */ > + > +/dts-v1/; > + > +#include "meson-s4.dtsi" > + > +/ { > + model = "Amlogic Meson S4 AQ222 Development Board"; > + compatible = "amlogic,aq222", "amlogic,s4"; > + interrupt-parent = <&gic>; > + #address-cells = <2>; > + #size-cells = <2>; > + > + aliases { > + serial0 = &uart_B; > + }; > + > + memory@00000000 { > + device_type = "memory"; > + reg = <0x0 0x0 0x0 0x40000000>; > + }; > + > +}; > + > +&uart_B { > + status = "okay"; > +}; > diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi > new file mode 100644 > index 000000000000..d7083c93d3d0 > --- /dev/null > +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi > @@ -0,0 +1,99 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2021 Amlogic, Inc. All rights reserved. > + */ > + > +#include > +#include > + > +/ { > + cpus:cpus { ^ space after : ? Do we need the alias here ? > + #address-cells = <2>; > + #size-cells = <0>; > + > + CPU0:cpu@0 { ^ space after : ? Why is the alias uppercase ? same for the other nodes > + device_type = "cpu"; > + compatible = "arm,cortex-a35","arm,armv8"; > + reg = <0x0 0x0>; > + enable-method = "psci"; > + }; > + > + CPU1:cpu@1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a35","arm,armv8"; > + reg = <0x0 0x1>; > + enable-method = "psci"; > + }; > + > + CPU2:cpu@2 { > + device_type = "cpu"; > + compatible = "arm,cortex-a35","arm,armv8"; > + reg = <0x0 0x2>; > + enable-method = "psci"; > + }; > + > + CPU3:cpu@3 { > + device_type = "cpu"; > + compatible = "arm,cortex-a35","arm,armv8"; > + reg = <0x0 0x3>; > + enable-method = "psci"; > + }; > + }; > + > + timer { > + compatible = "arm,armv8-timer"; > + interrupts = , > + , > + , > + ; > + }; > + > + psci { > + compatible = "arm,psci-1.0"; > + method = "smc"; > + }; > + > + xtal: xtal-clk { > + compatible = "fixed-clock"; > + clock-frequency = <24000000>; > + clock-output-names = "xtal"; > + #clock-cells = <0>; > + }; > + > + soc { > + compatible = "simple-bus"; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + gic: interrupt-controller@fff01000 { > + compatible = "arm,gic-400"; > + #interrupt-cells = <3>; > + #address-cells = <0>; > + interrupt-controller; > + reg = <0x0 0xfff01000 0 0x1000>, > + <0x0 0xfff02000 0 0x2000>, > + <0x0 0xfff04000 0 0x2000>, > + <0x0 0xfff06000 0 0x2000>; > + interrupts = ; > + }; > + > + apb4: apb4@fe000000 { > + compatible = "simple-bus"; > + reg = <0x0 0xfe000000 0x0 0x480000>; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; > + > + uart_B: serial@7a000 { > + compatible = "amlogic,meson-s4-uart", > + "amlogic,meson-ao-uart"; > + reg = <0x0 0x7a000 0x0 0x18>; > + interrupts = ; > + status = "disabled"; > + clocks = <&xtal>, <&xtal>, <&xtal>; > + clock-names = "xtal", "pclk", "baud"; > + }; > + }; > + }; > +}; > > base-commit: c5468e3c930d4d2937d3a842a85df0f74e95e152 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic