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Fri, 01 Mar 2024 07:30:02 -0800 (PST) Received: from localhost ([2a01:e0a:3c5:5fb1:efbe:c807:bcd8:19bf]) by smtp.gmail.com with ESMTPSA id n18-20020adffe12000000b0033d67791dc0sm4797347wrr.43.2024.03.01.07.30.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Mar 2024 07:30:01 -0800 (PST) References: <20240301132936.621238-1-avromanov@salutedevices.com> <20240301132936.621238-4-avromanov@salutedevices.com> User-agent: mu4e 1.10.8; emacs 29.1 From: Jerome Brunet To: Alexey Romanov Cc: neil.armstrong@linaro.org, clabbe@baylibre.com, herbert@gondor.apana.org.au, davem@davemloft.net, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, vadim.fedorenko@linux.dev, linux-crypto@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@salutedevices.com Subject: Re: [PATCH v5 03/21] drivers: crypto: meson: make CLK controller optional Date: Fri, 01 Mar 2024 16:21:20 +0100 In-reply-to: <20240301132936.621238-4-avromanov@salutedevices.com> Message-ID: <1jwmqmrmva.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240301_073005_128573_198D35F8 X-CRM114-Status: GOOD ( 19.41 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On Fri 01 Mar 2024 at 16:29, Alexey Romanov wrote: > Amlogic crypto IP doesn't take a clock input on some > SoCs: AXG / A1 / S4 / G12. So make it optional. > I commented this patch on v2 and the comment keep on being un-addressed. The SoC either: * has a clock that is required for the IP to work * Or does not It is not something you are free to provide or not. For the record, I find very hard believe that some SoC would have clock, and other would not, for the same HW. Isn't it more likely that the clock just happens to be left enabled by the bootloader on some SoC and it conviently allows to ignore it ? > Signed-off-by: Alexey Romanov > --- > drivers/crypto/amlogic/amlogic-gxl-core.c | 14 +++----------- > 1 file changed, 3 insertions(+), 11 deletions(-) > > diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c > index e9e733ed98e0..a3a69a59f476 100644 > --- a/drivers/crypto/amlogic/amlogic-gxl-core.c > +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c > @@ -269,16 +269,11 @@ static int meson_crypto_probe(struct platform_device *pdev) > dev_err(&pdev->dev, "Cannot request MMIO err=%d\n", err); > return err; > } > - mc->busclk = devm_clk_get(&pdev->dev, "blkmv"); > + > + mc->busclk = devm_clk_get_optional_enabled(&pdev->dev, "blkmv"); > if (IS_ERR(mc->busclk)) { > err = PTR_ERR(mc->busclk); > - dev_err(&pdev->dev, "Cannot get core clock err=%d\n", err); > - return err; > - } > - > - err = clk_prepare_enable(mc->busclk); > - if (err != 0) { > - dev_err(&pdev->dev, "Cannot prepare_enable busclk\n"); > + dev_err(&pdev->dev, "Cannot get and enable core clock err=%d\n", err); > return err; > } > > @@ -306,7 +301,6 @@ static int meson_crypto_probe(struct platform_device *pdev) > meson_unregister_algs(mc); > error_flow: > meson_free_chanlist(mc, mc->flow_cnt - 1); > - clk_disable_unprepare(mc->busclk); > return err; > } > > @@ -321,8 +315,6 @@ static void meson_crypto_remove(struct platform_device *pdev) > meson_unregister_algs(mc); > > meson_free_chanlist(mc, mc->flow_cnt - 1); > - > - clk_disable_unprepare(mc->busclk); > } > > static const struct meson_pdata meson_gxl_pdata = { -- Jerome _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic