From mboxrd@z Thu Jan 1 00:00:00 1970 From: martin.blumenstingl@googlemail.com (Martin Blumenstingl) Date: Fri, 25 Nov 2016 14:01:55 +0100 Subject: [PATCH v2 6/7] ARM64: dts: meson-gxbb-vega-s95: add reset for the ethernet PHY In-Reply-To: <20161125130156.17879-1-martin.blumenstingl@googlemail.com> References: <20161124143417.10178-1-martin.blumenstingl@googlemail.com> <20161125130156.17879-1-martin.blumenstingl@googlemail.com> Message-ID: <20161125130156.17879-7-martin.blumenstingl@googlemail.com> To: linus-amlogic@lists.infradead.org List-Id: linus-amlogic.lists.infradead.org This resets the ethernet PHY during boot to get the PHY into a "clean" state. While here also specify the phy-handle of the ethmac node to make the PHY configuration similar to the one we have on GXL devices. Signed-off-by: Martin Blumenstingl --- arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi index e59ad30..a0e92e3 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi @@ -113,10 +113,25 @@ pinctrl-names = "default"; }; +&mdio0 { + ethernet_phy0: ethernet-phy at 0 { + compatible = "ethernet-phy-id001c.c916", "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; +}; + ðmac { status = "okay"; pinctrl-0 = <ð_rgmii_pins>; pinctrl-names = "default"; + + phy-handle = <ðernet_phy0>; + + snps,reset-gpio = <&gpio GPIOZ_14 0>; + snps,reset-delays-us = <0 10000 1000000>; + snps,reset-active-low; + + phy-mode = "rgmii"; }; &usb0_phy { -- 2.10.2