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From: martin.blumenstingl@googlemail.com (Martin Blumenstingl)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH v2 0/3] add the reset controller to the Meson8b clkc
Date: Sat, 22 Jul 2017 20:58:04 +0200	[thread overview]
Message-ID: <20170722185807.10504-1-martin.blumenstingl@googlemail.com> (raw)

This registers the known (soft) reset lines provided by the clock
controller's registers.

This is the first preparation step for SMP and CPU hotplug support on
Meson8/Meson8b/Meson8m2. Booting the secondary cores on these SoCs
requires asserting and de-asserting a reset line (one for each CPU
core). These reset lines are provided by the clock controller.

The reset controller part of the meson8b clock controller has to be
registered early (which I did through CLK_OF_DECLARE_DRIVER), because
the secondary cores are started *very* early in the boot process (and
meson8b_clkc_probe is invoked long after we need the reset controller
to be available for booting the secondary CPU cores).

The user of the reset-controller (= the patches which enable SMP and
CPU hotplug support) will follow in the next days. I decided to split
this because the SMP series will probably consist of 6 patches alone
(and may need to go through two separate trees).


Changes since v1 at [0]:
- updated cover letter description as we are now registering more than
  four reset lines
- split patch #1 into a dt-binding and clk driver patch
- slightly reworded the dt-binding documentation so it's now clear that
  the reset identifiers are preprocessor macros in
  dt-bindings/clock/meson8b-clkc.h (v1 of this series didn't have these
  macros at all)
- patch #2 (previously part of patch #1) now registers all known reset
  lines (see [1] and [2] for the results of my detective work)
- patch #3 is untouched


[0] http://lists.infradead.org/pipermail/linux-amlogic/2017-July/004283.html
[1] http://lists.infradead.org/pipermail/linux-amlogic/2017-July/004330.html
[2] http://lists.infradead.org/pipermail/linux-amlogic/2017-July/004347.html


Martin Blumenstingl (3):
  dt-bindings: clock: meson8b: describe the embedded reset controller
  clk: meson: meson8b: register the built-in reset controller
  ARM: dts: meson: mark the clock controller also as reset controller

 .../bindings/clock/amlogic,meson8b-clkc.txt        |   8 +-
 arch/arm/boot/dts/meson8.dtsi                      |   1 +
 arch/arm/boot/dts/meson8b.dtsi                     |   1 +
 drivers/clk/meson/Kconfig                          |   1 +
 drivers/clk/meson/meson8b.c                        | 159 +++++++++++++++++++--
 drivers/clk/meson/meson8b.h                        |  25 +++-
 6 files changed, 181 insertions(+), 14 deletions(-)

-- 
2.13.3

             reply	other threads:[~2017-07-22 18:58 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-22 18:58 Martin Blumenstingl [this message]
2017-07-22 18:58 ` [PATCH v2 1/3] dt-bindings: clock: meson8b: describe the embedded reset controller Martin Blumenstingl
2017-07-25  7:55   ` Neil Armstrong
2017-07-22 18:58 ` [PATCH v2 2/3] clk: meson: meson8b: register the built-in " Martin Blumenstingl
2017-07-25  7:58   ` Neil Armstrong
2017-07-25 19:17     ` Martin Blumenstingl
2017-07-22 18:58 ` [PATCH v2 3/3] ARM: dts: meson: mark the clock controller also as " Martin Blumenstingl
2017-07-25  7:58   ` Neil Armstrong

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