From: jbrunet@baylibre.com (Jerome Brunet)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH v2 04/19] clk: meson: remove obsolete comments
Date: Mon, 12 Feb 2018 15:58:31 +0100 [thread overview]
Message-ID: <20180212145846.19380-5-jbrunet@baylibre.com> (raw)
In-Reply-To: <20180212145846.19380-1-jbrunet@baylibre.com>
Over time things changes in CCF and issues have been fixed in meson
controllers.
Now, clk81 is decently modeled by read-only PLLs, a mux, a divider
and a gate. We can remove the FIXME comments related to clk81.
Also remove the comment about devm_clk_hw_register, as there is
apparently nothing wrong with it.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
drivers/clk/meson/axg.c | 5 -----
drivers/clk/meson/gxbb.c | 6 ------
drivers/clk/meson/meson8b.c | 1 -
3 files changed, 12 deletions(-)
diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index 3bb77b4f1e8d..bc5c29f13282 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -411,11 +411,6 @@ static struct meson_clk_mpll axg_mpll3 = {
},
};
-/*
- * FIXME The legacy composite clocks (e.g. clk81) are both PLL post-dividers
- * and should be modeled with their respective PLLs via the forthcoming
- * coordinated clock rates feature
- */
static u32 mux_table_clk81[] = { 0, 2, 3, 4, 5, 6, 7 };
static const char * const clk81_parent_names[] = {
"xtal", "fclk_div7", "mpll1", "mpll2", "fclk_div4",
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index e6adab49c0ba..6609024eee00 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -575,12 +575,6 @@ static struct meson_clk_mpll gxbb_mpll2 = {
},
};
-/*
- * FIXME The legacy composite clocks (e.g. clk81) are both PLL post-dividers
- * and should be modeled with their respective PLLs via the forthcoming
- * coordinated clock rates feature
- */
-
static u32 mux_table_clk81[] = { 0, 2, 3, 4, 5, 6, 7 };
static const char * const clk81_parent_names[] = {
"xtal", "fclk_div7", "mpll1", "mpll2", "fclk_div4",
diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
index ffadad27375e..db017c29a84c 100644
--- a/drivers/clk/meson/meson8b.c
+++ b/drivers/clk/meson/meson8b.c
@@ -849,7 +849,6 @@ static int meson8b_clkc_probe(struct platform_device *pdev)
if (!meson8b_hw_onecell_data.hws[i])
continue;
- /* FIXME convert to devm_clk_register */
ret = devm_clk_hw_register(dev, meson8b_hw_onecell_data.hws[i]);
if (ret)
return ret;
--
2.14.3
next prev parent reply other threads:[~2018-02-12 14:58 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-12 14:58 [PATCH v2 00/19] clk: meson: use regmap in clock controllers Jerome Brunet
2018-02-12 14:58 ` [PATCH v2 01/19] clk: meson: use dev pointer where possible Jerome Brunet
2018-02-12 14:58 ` [PATCH v2 02/19] clk: meson: use devm_of_clk_add_hw_provider Jerome Brunet
2018-02-12 14:58 ` [PATCH v2 03/19] clk: meson: only one loop index is necessary in probe Jerome Brunet
2018-02-12 14:58 ` Jerome Brunet [this message]
2018-02-12 14:58 ` [PATCH v2 05/19] clk: meson: add regmap clocks Jerome Brunet
2018-02-12 14:58 ` [PATCH v2 06/19] clk: meson: switch gxbb ao_clk to clk_regmap Jerome Brunet
2018-02-12 14:58 ` [PATCH v2 07/19] clk: meson: remove superseded aoclk_gate_regmap Jerome Brunet
2018-02-12 14:58 ` [PATCH v2 08/19] clk: meson: add regmap to the clock controllers Jerome Brunet
2018-02-12 14:58 ` [PATCH v2 09/19] clk: meson: migrate gates to clk_regmap Jerome Brunet
2018-02-12 14:58 ` [PATCH v2 10/19] clk: meson: migrate dividers " Jerome Brunet
2018-02-12 14:58 ` [PATCH v2 11/19] clk: meson: migrate muxes " Jerome Brunet
2018-02-12 14:58 ` [PATCH v2 12/19] clk: meson: add regmap helpers for parm Jerome Brunet
2018-02-12 14:58 ` [PATCH v2 13/19] clk: meson: migrate mplls clocks to clk_regmap Jerome Brunet
2018-02-12 14:58 ` [PATCH v2 14/19] clk: meson: migrate the audio divider clock " Jerome Brunet
2018-02-12 14:58 ` [PATCH v2 15/19] clk: meson: migrate plls clocks " Jerome Brunet
2018-02-12 14:58 ` [PATCH v2 16/19] clk: meson: split divider and gate part of mpll Jerome Brunet
2018-02-12 14:58 ` [PATCH v2 17/19] clk: meson: rework meson8b cpu clock Jerome Brunet
2018-02-18 20:59 ` Martin Blumenstingl
2018-02-12 14:58 ` [PATCH v2 18/19] clk: meson: remove obsolete cpu_clk Jerome Brunet
2018-02-12 14:58 ` [PATCH v2 19/19] clk: meson: use hhi syscon if available Jerome Brunet
2018-03-12 10:22 ` [PATCH v2 00/19] clk: meson: use regmap in clock controllers Neil Armstrong
2018-03-12 18:25 ` Michael Turquette
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