From: yixun.lan@amlogic.com (Yixun Lan)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH v3 5/6] clk: meson: drop CLK_SET_RATE_PARENT flag
Date: Wed, 28 Mar 2018 10:50:49 +0800 [thread overview]
Message-ID: <20180328025050.221585-6-yixun.lan@amlogic.com> (raw)
In-Reply-To: <20180328025050.221585-1-yixun.lan@amlogic.com>
The clk81 is not expected to be changed, so drop this flag.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
---
drivers/clk/meson/gxbb-aoclk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/meson/gxbb-aoclk.c b/drivers/clk/meson/gxbb-aoclk.c
index 5a922639a264..89b048aad239 100644
--- a/drivers/clk/meson/gxbb-aoclk.c
+++ b/drivers/clk/meson/gxbb-aoclk.c
@@ -70,7 +70,7 @@ static struct clk_regmap _name##_ao = { \
.ops = &clk_regmap_gate_ops, \
.parent_names = (const char *[]){ "clk81" }, \
.num_parents = 1, \
- .flags = (CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED), \
+ .flags = CLK_IGNORE_UNUSED, \
}, \
}
--
2.15.1
next prev parent reply other threads:[~2018-03-28 2:50 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-28 2:50 [PATCH v3 0/6] clk: meson-axg: Add AO Cloclk and Reset driver Yixun Lan
2018-03-28 2:50 ` [PATCH v3 1/6] clk: meson: aoclk: refactor common code into dedicated file Yixun Lan
2018-04-06 18:39 ` Stephen Boyd
2018-04-08 3:00 ` Yixun Lan
2018-03-28 2:50 ` [PATCH v3 2/6] dt-bindings: clock: axg-aoclkc: New binding for Meson-AXG SoC Yixun Lan
2018-03-28 2:50 ` [PATCH v3 3/6] dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings Yixun Lan
2018-03-28 2:50 ` [PATCH v3 4/6] clk: meson-axg: Add AO Clock and Reset controller driver Yixun Lan
2018-04-06 20:07 ` Stephen Boyd
2018-03-28 2:50 ` Yixun Lan [this message]
2018-03-28 2:50 ` [PATCH v3 6/6] clk: meson: drop CLK_IGNORE_UNUSED flag Yixun Lan
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