From: jbrunet@baylibre.com (Jerome Brunet)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH 0/4] pinctrl: meson: fix pull bits
Date: Mon, 29 Oct 2018 16:13:36 +0100 [thread overview]
Message-ID: <20181029151340.9087-1-jbrunet@baylibre.com> (raw)
This patchset fixes the inversion between pull (up/down) and pull enable
bits on the GPIO AO bank of all amlogic when have, except the axg family.
The problem has been found while testing bias setting on the libretech
aml-s905x-cc on GPIO_AO 5. Unfortunately the bias register of this bank is
not described in the public datasheet of the s905x, but it is in the
one of the A113D, which gave a clue.
This was tested on gxl libretech aml-s905x-cc. Since all Amlogic we have
got so far derive from each other, there is no reason for things to be
any different on the meson8(b).
I would have preferred to make a single patch to fix this but the commit
introducing the mistake the is different for each SoC, so a single patch
could be more difficult/annoying to backport.
Jerome Brunet (4):
pinctrl: meson: fix gxbb ao pull register bits
pinctrl: meson: fix gxl ao pull register bits
pinctrl: meson: fix meson8 ao pull register bits
pinctrl: meson: fix meson8b ao pull register bits
drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 2 +-
drivers/pinctrl/meson/pinctrl-meson-gxl.c | 2 +-
drivers/pinctrl/meson/pinctrl-meson8.c | 2 +-
drivers/pinctrl/meson/pinctrl-meson8b.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
--
2.17.2
next reply other threads:[~2018-10-29 15:13 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-29 15:13 Jerome Brunet [this message]
2018-10-29 15:13 ` [PATCH 1/4] pinctrl: meson: fix gxbb ao pull register bits Jerome Brunet
2018-10-29 15:13 ` [PATCH 2/4] pinctrl: meson: fix gxl " Jerome Brunet
2018-10-29 15:13 ` [PATCH 3/4] pinctrl: meson: fix meson8 " Jerome Brunet
2018-10-29 15:13 ` [PATCH 4/4] pinctrl: meson: fix meson8b " Jerome Brunet
2018-10-31 14:05 ` [PATCH 0/4] pinctrl: meson: fix pull bits Linus Walleij
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