From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: linux-amlogic@lists.infradead.org, khilman@baylibre.com
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] ARM: dts: meson8b: ec100: enable the Ethernet PHY interrupt
Date: Sat, 19 Jan 2019 00:43:37 +0100 [thread overview]
Message-ID: <20190118234339.16050-2-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20190118234339.16050-1-martin.blumenstingl@googlemail.com>
The INTR32 pin of the IP101GR Ethernet PHY is routed to the GPIOH_3 pad
on the SoC.
Enable the interrupt function of the PHY's INTR32 pin to switch it from
it's default "receive error" mode to "interrupt pin" mode.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
arch/arm/boot/dts/meson8b-ec100.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/meson8b-ec100.dts b/arch/arm/boot/dts/meson8b-ec100.dts
index cba0006e2de0..1a41d89d1fa5 100644
--- a/arch/arm/boot/dts/meson8b-ec100.dts
+++ b/arch/arm/boot/dts/meson8b-ec100.dts
@@ -169,6 +169,10 @@
eth_phy0: ethernet-phy@0 {
/* IC Plus IP101A/G (0x02430c54) */
reg = <0>;
+ icplus,select-interrupt;
+ interrupt-parent = <&gpio_intc>;
+ /* GPIOH_3 */
+ interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
};
};
};
--
2.20.1
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next prev parent reply other threads:[~2019-01-18 23:44 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-18 23:43 [PATCH 0/3] ARM: dts: meson8b: ec100: improvements Martin Blumenstingl
2019-01-18 23:43 ` Martin Blumenstingl [this message]
2019-01-18 23:43 ` [PATCH 2/3] ARM: dts: meson8b: ec100: improve the description of the regulators Martin Blumenstingl
2019-01-18 23:43 ` [PATCH 3/3] ARM: dts: meson8b: ec100: add the GPIO line names Martin Blumenstingl
2019-02-07 3:43 ` [PATCH 0/3] ARM: dts: meson8b: ec100: improvements Kevin Hilman
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