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From: Jerome Brunet <jbrunet@baylibre.com>
To: Neil Armstrong <narmstrong@baylibre.com>
Cc: linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Jerome Brunet <jbrunet@baylibre.com>
Subject: [PATCH 3/4] clk: meson: eeclk: add init regs
Date: Mon, 25 Mar 2019 12:11:59 +0100	[thread overview]
Message-ID: <20190325111200.15940-4-jbrunet@baylibre.com> (raw)
In-Reply-To: <20190325111200.15940-1-jbrunet@baylibre.com>

Like the PLL and MPLL, the controller may require some magic setting to
be applied on startup.

This is needed when the initial setting is not applied by the boot ROM.
The controller need to do it when the setting applies to several clock,
like all the MPLLs in the case of g12a.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
 drivers/clk/meson/meson-eeclk.c | 3 +++
 drivers/clk/meson/meson-eeclk.h | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/drivers/clk/meson/meson-eeclk.c b/drivers/clk/meson/meson-eeclk.c
index 37a34c9c3885..6ba2094be257 100644
--- a/drivers/clk/meson/meson-eeclk.c
+++ b/drivers/clk/meson/meson-eeclk.c
@@ -34,6 +34,9 @@ int meson_eeclkc_probe(struct platform_device *pdev)
 		return PTR_ERR(map);
 	}
 
+	if (data->init_count)
+		regmap_multi_reg_write(map, data->init_regs, data->init_count);
+
 	input = meson_clk_hw_register_input(dev, "xtal", IN_PREFIX "xtal", 0);
 	if (IS_ERR(input)) {
 		ret = PTR_ERR(input);
diff --git a/drivers/clk/meson/meson-eeclk.h b/drivers/clk/meson/meson-eeclk.h
index 1b809b1419fe..9ab5d6fa7ccb 100644
--- a/drivers/clk/meson/meson-eeclk.h
+++ b/drivers/clk/meson/meson-eeclk.h
@@ -17,6 +17,8 @@ struct platform_device;
 struct meson_eeclkc_data {
 	struct clk_regmap *const	*regmap_clks;
 	unsigned int			regmap_clk_num;
+	const struct reg_sequence	*init_regs;
+	unsigned int			init_count;
 	struct clk_hw_onecell_data	*hw_onecell_data;
 };
 
-- 
2.20.1


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  parent reply	other threads:[~2019-03-25 11:12 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-25 11:11 [PATCH 0/4] clk: meson: fixup g12a mpll Jerome Brunet
2019-03-25 11:11 ` [PATCH 1/4] clk: meson: mpll: add init callback and regs Jerome Brunet
2019-03-25 17:10   ` Stephen Boyd
2019-03-26  7:53     ` Jerome Brunet
2019-03-29 22:14       ` Stephen Boyd
2019-03-29 22:58         ` Jerome Brunet
2019-04-05 13:21           ` Jerome Brunet
2019-04-05 15:43           ` Michael Turquette
2019-04-05 20:43             ` Stephen Boyd
2019-04-08  7:38               ` Jerome Brunet
2019-04-23 17:34                 ` Michael Turquette
2019-04-23 23:19                   ` Stephen Boyd
2019-03-25 11:11 ` [PATCH 2/4] clk: meson: g12a: add mpll register init sequences Jerome Brunet
2019-03-25 11:11 ` Jerome Brunet [this message]
2019-03-25 11:12 ` [PATCH 4/4] clk: meson: g12a: add controller register init Jerome Brunet

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