From: Jerome Brunet <jbrunet@baylibre.com>
To: Neil Armstrong <narmstrong@baylibre.com>
Cc: linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org,
Jerome Brunet <jbrunet@baylibre.com>
Subject: [PATCH 3/3] clk: meson: axg: spread spectrum is on mpll2
Date: Fri, 29 Mar 2019 16:33:25 +0100 [thread overview]
Message-ID: <20190329153325.23869-4-jbrunet@baylibre.com> (raw)
In-Reply-To: <20190329153325.23869-1-jbrunet@baylibre.com>
After testing, it appears that the SSEN bit controls the spread
spectrum function on MPLL2, not MPLL0.
Fixes: 78b4af312f91 ("clk: meson-axg: add clock controller drivers")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
drivers/clk/meson/axg.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index 7a8ef80e5f2c..3ddd0efc9ee0 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -469,11 +469,6 @@ static struct clk_regmap axg_mpll0_div = {
.shift = 16,
.width = 9,
},
- .ssen = {
- .reg_off = HHI_MPLL_CNTL,
- .shift = 25,
- .width = 1,
- },
.misc = {
.reg_off = HHI_PLL_TOP_MISC,
.shift = 0,
@@ -568,6 +563,11 @@ static struct clk_regmap axg_mpll2_div = {
.shift = 16,
.width = 9,
},
+ .ssen = {
+ .reg_off = HHI_MPLL_CNTL,
+ .shift = 25,
+ .width = 1,
+ },
.misc = {
.reg_off = HHI_PLL_TOP_MISC,
.shift = 2,
--
2.20.1
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next prev parent reply other threads:[~2019-03-29 15:34 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-29 15:33 [PATCH 0/3] clk: meson: fix mpll jitter Jerome Brunet
2019-03-29 15:33 ` [PATCH 1/3] clk: meson: mpll: properly handle spread spectrum Jerome Brunet
2019-03-29 19:39 ` Martin Blumenstingl
2019-03-29 23:07 ` Jerome Brunet
2019-03-30 15:56 ` Martin Blumenstingl
2019-04-01 8:40 ` Jerome Brunet
2019-04-01 17:13 ` Martin Blumenstingl
2019-03-29 15:33 ` [PATCH 2/3] clk: meson: gxbb: no spread spectrum on mpll0 Jerome Brunet
2019-03-29 15:33 ` Jerome Brunet [this message]
2019-03-30 15:58 ` [PATCH 0/3] clk: meson: fix mpll jitter Martin Blumenstingl
2019-04-01 8:40 ` Jerome Brunet
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