From: David Miller <davem@davemloft.net>
To: martin.blumenstingl@googlemail.com
Cc: linus.luessing@c0d3.blue, balbes-150@yandex.ru,
khilman@baylibre.com, linux-kernel@vger.kernel.org,
ingrassia@epigenesys.com, netdev@vger.kernel.org,
linux-amlogic@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, jbrunet@baylibre.com
Subject: Re: [PATCH 0/3] Meson8b/8m2: Ethernet RGMII TX delay fixes
Date: Fri, 27 Dec 2019 16:33:48 -0800 (PST) [thread overview]
Message-ID: <20191227.163348.1668601477335834984.davem@davemloft.net> (raw)
In-Reply-To: <20191225005655.1502037-1-martin.blumenstingl@googlemail.com>
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Wed, 25 Dec 2019 01:56:52 +0100
> The Ethernet TX performance has been historically bad on Meson8b and
> Meson8m2 SoCs because high packet loss was seen. Today I (presumably)
> found out why this is: the input clock (which feeds the RGMII TX clock)
> has to be at least 4 times 125MHz. With the fixed "divide by 2" in the
> clock tree this means that m250_div needs to be at least 2.
...
It looks there needs to be more discussion on this series, please respin
once the discussions are resolved.
Thank you.
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prev parent reply other threads:[~2019-12-28 0:34 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-25 0:56 Martin Blumenstingl
2019-12-25 0:56 ` [PATCH 1/3] net: stmmac: dwmac-meson8b: Fix the RGMII TX delay on Meson8b/8m2 SoCs Martin Blumenstingl
2019-12-25 15:08 ` Andrew Lunn
2019-12-25 15:33 ` Martin Blumenstingl
2019-12-26 10:50 ` Andrew Lunn
2019-12-26 11:39 ` Martin Blumenstingl
2019-12-26 12:01 ` Andrew Lunn
2019-12-26 18:17 ` Martin Blumenstingl
2019-12-25 0:56 ` [PATCH 2/3] ARM: dts: meson8b: odroidc1: use the same RGMII TX delay as u-boot Martin Blumenstingl
2019-12-25 0:56 ` [PATCH 3/3] ARM: dts: meson8m2: mxiii-plus: " Martin Blumenstingl
2019-12-28 0:33 ` David Miller [this message]
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