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[2003:f1:3710:ed00:428d:5cff:feb9:9db8]) by smtp.googlemail.com with ESMTPSA id b187sm1260509wmc.14.2020.03.30.15.11.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Mar 2020 15:11:27 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, khilman@baylibre.com, jbrunet@baylibre.com, narmstrong@baylibre.com Subject: [RFC v1 0/5] GPU DVFS for Meson GXBB/GXL/GXM/G12A/G12B/SM1 Date: Tue, 31 Mar 2020 00:10:59 +0200 Message-Id: <20200330221104.3163788-1-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.26.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200330_151130_219474_C5ED7B76 X-CRM114-Status: GOOD ( 11.07 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Blumenstingl , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Now that we have GPU DVFS support in lima [0] (queued for Linux 5.7) and panfrost we can make it work on Amlogic SoCs. The first two patches update the clock drivers to allow runtime frequency changes of the mali clock tree. This is similar to what I have implemented for Meson8b/Meson8m2 already. The remaining three patches add the GPU OPP tables to the .dtsi files. I decided to remove code duplication for the Mali-450 GPU on GXBB and GXL so it will be easier to maintain this. This refactoring is part of patch #3. Patches #4 (GXM) and #5 (G12A, G12B, SM1) are straight forward; it replaces the hardcoded clock settings with the the GPU OPP table. I used the userspace devfreq governor to cycle through all available GPU frequency settings on GXL, GXM and G12A (which covers all relevant GPU driver and clock driver combinations). I have taken the GPU OPP tables from Amlogic's 4.9 vendor kernel and the voltage settings (opp-microvolt property) from the public dataseheets for all SoCs. [0] https://cgit.freedesktop.org/drm-misc/commit/?id=1996970773a323533e1cc1b6b97f00a95d675f32 Martin Blumenstingl (5): clk: meson: gxbb: Prepare the GPU clock tree to change at runtime clk: meson: g12a: Prepare the GPU clock tree to change at runtime arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS arm64: dts: amlogic: meson-g12: add the Mali OPP table and use DVFS .../boot/dts/amlogic/meson-g12-common.dtsi | 49 ++++++++++----- .../boot/dts/amlogic/meson-gx-mali450.dtsi | 61 +++++++++++++++++++ arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 51 ++++------------ .../boot/dts/amlogic/meson-gxl-mali.dtsi | 46 +++----------- arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 45 +++++++++----- drivers/clk/meson/g12a.c | 30 ++++++--- drivers/clk/meson/gxbb.c | 40 ++++++------ 7 files changed, 189 insertions(+), 133 deletions(-) create mode 100644 arch/arm64/boot/dts/amlogic/meson-gx-mali450.dtsi -- 2.26.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic