From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: linux-amlogic@lists.infradead.org, khilman@baylibre.com,
jbrunet@baylibre.com, narmstrong@baylibre.com
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org
Subject: [RFC v1 4/5] arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS
Date: Tue, 31 Mar 2020 00:11:03 +0200 [thread overview]
Message-ID: <20200330221104.3163788-5-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20200330221104.3163788-1-martin.blumenstingl@googlemail.com>
Add the OPP table for the Mali-T820 GPU and drop the hardcoded initial
clock configuration. This enables GPU DVFS and thus saves power when the
GPU is not in use while still being able switch to a higher clock on
demand.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 45 ++++++++++++++--------
1 file changed, 30 insertions(+), 15 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
index b6f89f108e28..0f1d1cf4248f 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
@@ -82,6 +82,35 @@ cpu7: cpu@103 {
#cooling-cells = <2>;
};
};
+
+ gpu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-125000000 {
+ opp-hz = /bits/ 64 <125000000>;
+ opp-microvolt = <950000>;
+ };
+ opp-250000000 {
+ opp-hz = /bits/ 64 <250000000>;
+ opp-microvolt = <950000>;
+ };
+ opp-285714285 {
+ opp-hz = /bits/ 64 <285714285>;
+ opp-microvolt = <950000>;
+ };
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <950000>;
+ };
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <950000>;
+ };
+ opp-666666666 {
+ opp-hz = /bits/ 64 <666666666>;
+ opp-microvolt = <950000>;
+ };
+ };
};
&apb {
@@ -106,21 +135,7 @@ mali: gpu@c0000 {
interrupt-names = "job", "mmu", "gpu";
clocks = <&clkc CLKID_MALI>;
resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>;
-
- /*
- * Mali clocking is provided by two identical clock paths
- * MALI_0 and MALI_1 muxed to a single clock by a glitch
- * free mux to safely change frequency while running.
- */
- assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
- <&clkc CLKID_MALI_0>,
- <&clkc CLKID_MALI>; /* Glitch free mux */
- assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
- <0>, /* Do Nothing */
- <&clkc CLKID_MALI_0>;
- assigned-clock-rates = <0>, /* Do Nothing */
- <666666666>,
- <0>; /* Do Nothing */
+ operating-points-v2 = <&gpu_opp_table>;
};
};
--
2.26.0
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next prev parent reply other threads:[~2020-03-30 22:12 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-30 22:10 [RFC v1 0/5] GPU DVFS for Meson GXBB/GXL/GXM/G12A/G12B/SM1 Martin Blumenstingl
2020-03-30 22:11 ` [RFC v1 1/5] clk: meson: gxbb: Prepare the GPU clock tree to change at runtime Martin Blumenstingl
2020-03-30 22:11 ` [RFC v1 2/5] clk: meson: g12a: " Martin Blumenstingl
2020-03-30 22:11 ` [RFC v1 3/5] arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS Martin Blumenstingl
2020-03-31 7:44 ` Neil Armstrong
2020-03-31 13:31 ` Martin Blumenstingl
2020-03-30 22:11 ` Martin Blumenstingl [this message]
2020-03-30 22:11 ` [RFC v1 5/5] arm64: dts: amlogic: meson-g12: add the Mali " Martin Blumenstingl
2020-04-14 13:05 ` [RFC v1 0/5] GPU DVFS for Meson GXBB/GXL/GXM/G12A/G12B/SM1 Jerome Brunet
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