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[2003:f1:3717:df00:428d:5cff:feb9:9db8]) by smtp.googlemail.com with ESMTPSA id b4sm15540253wrv.42.2020.04.14.13.00.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Apr 2020 13:00:26 -0700 (PDT) From: Martin Blumenstingl To: jbrunet@baylibre.com, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org Subject: [PATCH 0/4] clk: meson8b: updates for video clocks / resets Date: Tue, 14 Apr 2020 22:00:13 +0200 Message-Id: <20200414200017.226136-1-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.26.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200414_130029_012602_1DF6CFA8 X-CRM114-Status: GOOD ( 10.23 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: narmstrong@baylibre.com, sboyd@kernel.org, mturquette@baylibre.com, linux-kernel@vger.kernel.org, Martin Blumenstingl , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org This is the first batch of fixes and updates for the Meson8/8b/8m2 clock controller driver. The first patch fixes the video clock hierarchy. Special thanks to Neil for providing a lot of details about the video clock tree! The second and third came up while testing video output on my EC-100 (Endless Mini). This board is special because u-boot does not enable the video outputs like most other u-boot versions do. However, this is very useful for development because it shows (the hard way ;)) where the existing code is buggy. The last patch is a small improvement for the VPU clock so we utilize the glitch-free mux (on SoCs which support it) and avoid problems by changing the "live" clock tree at runtime (with the mali clock this resulted in system hangs/freezes). In my opinion all of these patches - including the fixes - can go to "next" because the relevant clock trees are still read-only. Martin Blumenstingl (4): clk: meson: meson8b: Fix the first parent of vid_pll_in_sel clk: meson: meson8b: Fix the polarity of the RESET_N lines clk: meson: meson8b: Fix the vclk_div{1,2,4,6,12}_en gate bits clk: meson: meson8b: Make the CCF use the glitch-free VPU mux drivers/clk/meson/meson8b.c | 107 +++++++++++++++++++++++++----------- 1 file changed, 75 insertions(+), 32 deletions(-) -- 2.26.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic