From: Jiucheng Xu <jiucheng.xu@amlogic.com>
To: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>
Cc: Jianxin Pan <jianxin.pan@amlogic.com>,
Kelvin Zhang <kelvin.zhang@amlogic.com>,
Chris Healy <cphealy@gmail.com>, Chris Healy <healych@amazon.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
<linux-amlogic@lists.infradead.org>,
Jiucheng Xu <jiucheng.xu@amlogic.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH 3/3] arm64: defconfig: Add Meson DDR PMU as build-in
Date: Thu, 9 Feb 2023 19:54:03 +0800 [thread overview]
Message-ID: <20230209115403.521868-3-jiucheng.xu@amlogic.com> (raw)
In-Reply-To: <20230209115403.521868-1-jiucheng.xu@amlogic.com>
Add Meson DDR PMU to defconfig so that build errors are caught.
Signed-off-by: Jiucheng Xu <jiucheng.xu@amlogic.com>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 851e8f9be06d..9fefe659ade7 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -1296,6 +1296,7 @@ CONFIG_ARM_DMC620_PMU=m
CONFIG_QCOM_L2_PMU=y
CONFIG_QCOM_L3_PMU=y
CONFIG_HISI_PMU=y
+CONFIG_MESON_DDR_PMU=y
CONFIG_NVMEM_IMX_OCOTP=y
CONFIG_NVMEM_IMX_OCOTP_SCU=y
CONFIG_NVMEM_MTK_EFUSE=y
--
2.25.1
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next prev parent reply other threads:[~2023-02-09 11:54 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-09 11:54 [PATCH 1/3] perf/amlogic: Fix config1/config2 parsing issue Jiucheng Xu
2023-02-09 11:54 ` [PATCH 2/3] perf/amlogic: Fix large number of counter issue Jiucheng Xu
2023-03-27 14:10 ` Will Deacon
2023-03-28 2:29 ` Jiucheng Xu
2023-03-28 11:55 ` Will Deacon
2023-02-09 11:54 ` Jiucheng Xu [this message]
2023-02-10 15:58 ` [PATCH 3/3] arm64: defconfig: Add Meson DDR PMU as build-in Chris Healy
2023-03-27 15:01 ` [PATCH 1/3] perf/amlogic: Fix config1/config2 parsing issue Will Deacon
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