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From: Xianwei Zhao <xianwei.zhao@amlogic.com>
To: <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-amlogic@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	"Neil Armstrong" <neil.armstrong@linaro.org>,
	Kevin Hilman <khilman@baylibre.com>,
	xianwei.zhao <xianwei.zhao@amlogic.com>
Subject: [PATCH 4/6] dt-bindings: power: add Amlogic T7 power domains
Date: Thu, 17 Aug 2023 15:11:46 +0800	[thread overview]
Message-ID: <20230817071148.510575-5-xianwei.zhao@amlogic.com> (raw)
In-Reply-To: <20230817071148.510575-1-xianwei.zhao@amlogic.com>

From: "xianwei.zhao" <xianwei.zhao@amlogic.com>

Add devicetree binding document and related header file for
Amlogic T7 secure power domains.

Signed-off-by: xianwei.zhao <xianwei.zhao@amlogic.com>
---
 .../power/amlogic,meson-sec-pwrc.yaml         |  3 +-
 include/dt-bindings/power/amlogic,t7-pwrc.h   | 63 +++++++++++++++++++
 2 files changed, 65 insertions(+), 1 deletion(-)
 create mode 100644 include/dt-bindings/power/amlogic,t7-pwrc.h

diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
index d80bbedfe3aa..dab3d92bc273 100644
--- a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
+++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
@@ -12,7 +12,7 @@ maintainers:
   - Jianxin Pan <jianxin.pan@amlogic.com>
 
 description: |+
-  Secure Power Domains used in Meson A1/C1/S4 & C3 SoCs, and should be the child node
+  Secure Power Domains used in Meson A1/C1/S4 & C3/T7 SoCs, and should be the child node
   of secure-monitor.
 
 properties:
@@ -21,6 +21,7 @@ properties:
       - amlogic,meson-a1-pwrc
       - amlogic,meson-s4-pwrc
       - amlogic,c3-pwrc
+      - amlogic,t7-pwrc
 
   "#power-domain-cells":
     const: 1
diff --git a/include/dt-bindings/power/amlogic,t7-pwrc.h b/include/dt-bindings/power/amlogic,t7-pwrc.h
new file mode 100644
index 000000000000..b7a13eda563c
--- /dev/null
+++ b/include/dt-bindings/power/amlogic,t7-pwrc.h
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR .*) */
+/*
+ * Copyright (c) 2023 Amlogic, Inc.
+ * Author: Hongyu Chen <hongyu.chen1@amlogic.com>
+ */
+#ifndef _DT_BINDINGS_AMLOGIC_T7_POWER_H
+#define _DT_BINDINGS_AMLOGIC_T7_POWER_H
+
+#define PWRC_T7_DSPA_ID			0
+#define PWRC_T7_DSPB_ID			1
+#define PWRC_T7_DOS_HCODEC_ID		2
+#define PWRC_T7_DOS_HEVC_ID		3
+#define PWRC_T7_DOS_VDEC_ID		4
+#define PWRC_T7_DOS_WAVE_ID		5
+#define PWRC_T7_VPU_HDMI_ID		6
+#define PWRC_T7_USB_COMB_ID		7
+#define PWRC_T7_PCIE_ID			8
+#define PWRC_T7_GE2D_ID			9
+#define PWRC_T7_SRAMA_ID		10
+#define PWRC_T7_SRAMB_ID		11
+#define PWRC_T7_HDMIRX_ID		12
+#define PWRC_T7_VI_CLK1_ID		13
+#define PWRC_T7_VI_CLK2_ID		14
+#define PWRC_T7_ETH_ID			15
+#define PWRC_T7_ISP_ID			16
+#define PWRC_T7_MIPI_ISP_ID		17
+#define PWRC_T7_GDC_ID			18
+#define PWRC_T7_CVE_ID			18
+#define PWRC_T7_DEWARP_ID		19
+#define PWRC_T7_SDIO_A_ID		20
+#define PWRC_T7_SDIO_B_ID		21
+#define PWRC_T7_EMMC_ID			22
+#define PWRC_T7_MALI_SC0_ID		23
+#define PWRC_T7_MALI_SC1_ID		24
+#define PWRC_T7_MALI_SC2_ID		25
+#define PWRC_T7_MALI_SC3_ID		26
+#define PWRC_T7_MALI_TOP_ID		27
+#define PWRC_T7_NNA_CORE0_ID		28
+#define PWRC_T7_NNA_CORE1_ID		29
+#define PWRC_T7_NNA_CORE2_ID		30
+#define PWRC_T7_NNA_CORE3_ID		31
+#define PWRC_T7_NNA_TOP_ID		32
+#define PWRC_T7_DDR0_ID			33
+#define PWRC_T7_DDR1_ID			34
+#define PWRC_T7_DMC0_ID			35
+#define PWRC_T7_DMC1_ID			36
+#define PWRC_T7_NOC_ID			37
+#define PWRC_T7_NIC2_ID			38
+#define PWRC_T7_NIC3_ID			39
+#define PWRC_T7_CCI_ID			40
+#define PWRC_T7_MIPI_DSI0_ID		41
+#define PWRC_T7_SPICC0_ID		42
+#define PWRC_T7_SPICC1_ID		43
+#define PWRC_T7_SPICC2_ID		44
+#define PWRC_T7_SPICC3_ID		45
+#define PWRC_T7_SPICC4_ID		46
+#define PWRC_T7_SPICC5_ID		47
+#define PWRC_T7_EDP0_ID			48
+#define PWRC_T7_EDP1_ID			49
+#define PWRC_T7_MIPI_DSI1_ID		50
+#define PWRC_T7_AUDIO_ID		51
+
+#endif
-- 
2.37.1


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  parent reply	other threads:[~2023-08-17  7:12 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-17  7:11 [PATCH 0/6] Power: T7: add power domain driver Xianwei Zhao
2023-08-17  7:11 ` [PATCH 1/6] soc: amlogic: modify some power domains property Xianwei Zhao
2023-08-17  7:11 ` [PATCH 2/6] soc: amlogic: add driver to support power parent node Xianwei Zhao
2023-08-17  7:11 ` [PATCH 3/6] soc: amlogic: init power domain state Xianwei Zhao
2023-08-17  7:11 ` Xianwei Zhao [this message]
2023-08-19 14:20   ` [PATCH 4/6] dt-bindings: power: add Amlogic T7 power domains Krzysztof Kozlowski
2023-08-21  9:40     ` Xianwei Zhao
2023-08-17  7:11 ` [PATCH 5/6] soc: amlogic: Add support for T7 power domains controller Xianwei Zhao
2023-08-17  7:11 ` [PATCH 6/6] arm64: dts: add support for T7 power domain controller Xianwei Zhao

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