From: Xianwei Zhao via B4 Relay <devnull+xianwei.zhao.amlogic.com@kernel.org>
To: Sunny Luo <sunny.luo@amlogic.com>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-amlogic@lists.infradead.org, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Xianwei Zhao <xianwei.zhao@amlogic.com>,
Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v5 1/3] spi: dt-bindings: Add binding document of Amlogic SPISG controller
Date: Fri, 18 Jul 2025 09:52:16 +0800 [thread overview]
Message-ID: <20250718-spisg-v5-1-b8f0f1eb93a2@amlogic.com> (raw)
In-Reply-To: <20250718-spisg-v5-0-b8f0f1eb93a2@amlogic.com>
From: Sunny Luo <sunny.luo@amlogic.com>
The SPISG is a new communication oriented SPI controller of Amlogic, which
supports PIO, block DMA and scatter-gather DMA three operation modes.
Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
.../devicetree/bindings/spi/amlogic,a4-spisg.yaml | 59 ++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/Documentation/devicetree/bindings/spi/amlogic,a4-spisg.yaml b/Documentation/devicetree/bindings/spi/amlogic,a4-spisg.yaml
new file mode 100644
index 000000000000..9bfb8089f7ea
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/amlogic,a4-spisg.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2025 Amlogic, Inc. All rights reserved
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/amlogic,a4-spisg.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic SPI Scatter-Gather Controller
+
+maintainers:
+ - Xianwei Zhao <xianwei.zhao@amlogic.com>
+ - Sunny Luo <sunny.luo@amlogic.com>
+
+allOf:
+ - $ref: spi-controller.yaml#
+
+properties:
+ compatible:
+ const: amlogic,a4-spisg
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: core
+ - const: pclk
+
+ resets:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ spi@50000 {
+ compatible = "amlogic,a4-spisg";
+ reg = <0x50000 0x38>;
+ interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkc 37>,
+ <&clkc 93>;
+ clock-names = "core", "pclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
--
2.37.1
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next prev parent reply other threads:[~2025-07-18 2:08 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-18 1:52 [PATCH v5 0/3] support for amlogic the new SPI IP Xianwei Zhao via B4 Relay
2025-07-18 1:52 ` Xianwei Zhao via B4 Relay [this message]
2025-07-18 1:52 ` [PATCH v5 2/3] spi: Add Amlogic SPISG driver Xianwei Zhao via B4 Relay
2025-07-18 1:52 ` [PATCH v5 3/3] MAINTAINERS: Add an entry for Amlogic spi driver Xianwei Zhao via B4 Relay
2025-07-24 21:21 ` [PATCH v5 0/3] support for amlogic the new SPI IP Mark Brown
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