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From: Conor Dooley <conor@kernel.org>
To: linux-kernel-dev@aliel.fr
Cc: "Uwe Kleine-König" <ukleinek@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Heiner Kallweit" <hkallweit1@gmail.com>,
	"Neil Armstrong" <neil.armstrong@linaro.org>,
	"Kevin Hilman" <khilman@baylibre.com>,
	"Jerome Brunet" <jbrunet@baylibre.com>,
	"Martin Blumenstingl" <martin.blumenstingl@googlemail.com>,
	linux-pwm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org
Subject: Re: [PATCH v2 1/3] dt-bindings: pwm: amlogic: Add core clock for T7
Date: Sat, 26 Sep 2026 19:06:07 +0100	[thread overview]
Message-ID: <20260926-landless-prowess-df404db4d910@spud> (raw)
In-Reply-To: <8e23838a-da5e-499c-a8be-3e2a7a0939e7@aliel.fr>


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On Sat, Sep 26, 2026 at 11:43:20AM +0200, linux-kernel-dev@aliel.fr wrote:
> On 9/25/26 6:41 PM, Conor Dooley wrote:
> > On Fri, Sep 25, 2026 at 05:13:28PM +0200, Ronald Claveau via B4 Relay wrote:
> >> From: Ronald Claveau <linux-kernel-dev@aliel.fr>
> >>
> >> The T7, A1, C3, and S4 PWM controllers have a system clock in
> >> addition to the two input clocks of channels A and B.
> >>
> >> The channel clocks are acquired by index in the pwm driver,
> >> where the core clock is fetched by name, with optional get
> >> which is silent when not provided.
> >>
> >> Require clock-names and minimum 3 items for T7, where the
> >> PWM devices do not work without all 3 clocks.
> >>
> >> Add an example showing T7 usage with its fallback to
> >> amlogic,meson-s4-pwm.
> >>
> >> Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
> >> ---
> >>  .../devicetree/bindings/pwm/pwm-amlogic.yaml       | 33 ++++++++++++++++++++--
> >>  1 file changed, 31 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml
> >> index c337d85da40f1..59320f288552b 100644
> >> --- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml
> >> +++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml
> >> @@ -62,7 +62,7 @@ properties:
> >>  
> >>    clock-names:
> >>      minItems: 1
> >> -    maxItems: 2
> >> +    maxItems: 3
> >>  
> >>    power-domains:
> >>      maxItems: 1
> >> @@ -140,13 +140,34 @@ allOf:
> >>      then:
> >>        properties:
> >>          clocks:
> >> +          minItems: 2
> >>            items:
> >>              - description: input clock of PWM channel A
> >>              - description: input clock of PWM channel B
> >> -        clock-names: false
> >> +            - description: gate clock for the PWM controller
> >> +        clock-names:
> >> +          minItems: 2
> >> +          items:
> >> +            - const: channel-a
> >> +            - const: channel-b
> >> +            - const: core
> >>        required:
> >>          - clocks
> >>  
> >> +  - if:
> >> +      properties:
> >> +        compatible:
> >> +          contains:
> >> +            const: amlogic,t7-pwm
> > 
> > Shouldn't this (based on your reply on the previous version) be s4?
> > 
> 
> The change above is for S4 and SOCs which fallback to S4. It allows the
> third clock but let the schema validation compatible with two clocks
> existing DTS. Here for the T7, I add requirement for the exact 3 clocks.
> 
> Do you recommend to require the 3 clocks for all S4 and S4 fallback, and
> update the associated dtsi files ?

Yes, I think so. Sounds to me like they only work because of the
CLK_IGNORE_UNUSED set in their clock controller drivers, so the correct
thing to do is make them all require the third clock.

Chers,
Conor.
> 
> >> +    then:
> >> +      properties:
> >> +        clocks:
> >> +          minItems: 3
> >> +        clock-names:
> >> +          minItems: 3
> >> +      required:
> >> +        - clock-names
> >> +
> >>    - if:
> >>        properties:
> >>          compatible:
> >> @@ -182,3 +203,11 @@ examples:
> >>        clocks = <&pwm_src_a>, <&pwm_src_b>;
> >>        #pwm-cells = <3>;
> >>      };
> >> +  - |
> >> +    pwm@60000 {
> >> +      compatible = "amlogic,t7-pwm", "amlogic,meson-s4-pwm";
> >> +      reg = <0x60000 0x24>;
> >> +      clocks = <&channel_a>, <&channel_b>, <&core>;
> >> +      clock-names = "channel-a", "channel-b", "core";
> >> +      #pwm-cells = <3>;
> >> +    };
> >>
> >> -- 
> >> 2.49.0
> >>
> >>
> 
> 
> -- 
> Best regards,
> Ronald

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  reply	other threads:[~2026-09-26 18:06 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-25 15:13 [PATCH v2 0/3] Add T7 PWM core clock support Ronald Claveau via B4 Relay
2026-09-25 15:13 ` [PATCH v2 1/3] dt-bindings: pwm: amlogic: Add core clock for T7 Ronald Claveau via B4 Relay
2026-09-25 16:41   ` Conor Dooley
2026-09-26  9:43     ` linux-kernel-dev
2026-09-26 18:06       ` Conor Dooley [this message]
2026-09-25 15:13 ` [PATCH v2 2/3] pwm: meson: Add optional core clock for S4 PWM Ronald Claveau via B4 Relay
2026-09-25 15:13 ` [PATCH v2 3/3] arm64: dts: amlogic: t7: Add core clock to PWM controller nodes Ronald Claveau via B4 Relay

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