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Thu, 22 Oct 2026 21:53:05 +0000 (UTC) From: Ronald Claveau via B4 Relay Date: Thu, 22 Oct 2026 23:52:39 +0200 Subject: [PATCH 1/4] clk: meson: g12a: fix fclk_div2p5 multiplier X-Archived-By: MIME-Version: 1.0 Message-Id: <20261022-fix-g12a-clk-v1-1-e2bd8f3f1afa@aliel.fr> References: <20261022-fix-g12a-clk-v1-0-e2bd8f3f1afa@aliel.fr> In-Reply-To: <20261022-fix-g12a-clk-v1-0-e2bd8f3f1afa@aliel.fr> To: Neil Armstrong , Jerome Brunet , Stephen Boyd , Brian Masney , Kevin Hilman , Martin Blumenstingl , Jian Hu Cc: linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Ronald Claveau X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=828; i=linux-kernel-dev@aliel.fr; h=from:subject:message-id; bh=kmf21z98rptos6YhBfPRKtB/DG5G/xeS94e38Rd7M00=; b=owGbwMvMwCWm1SvKXP3cUInxtFoSQ9at1j062/vqpNvFbynuv/zmVmqp9x1xU44b11/OfiLw+ CbTTtWzHaUsDGJcDLJiiiz9cy1PvLt89MzXPeopMHNYmUCGMHBxCsBE7qUz/M9oLN/5IiL8XZ3i OlWejYrcvW5rM91kn39Km6B3RHPPAT9GhsnzL94waohu3Fz6avurlIffpgUoyup8Wfkk7P5h9pU lE7kA X-Developer-Key: i=linux-kernel-dev@aliel.fr; a=openpgp; fpr=DFD863F61375BF917F0012173953305EF1D0EC3E X-Endpoint-Received: by B4 Relay for linux-kernel-dev@aliel.fr/default with auth_id=744 X-Original-From: Ronald Claveau X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: linux-kernel-dev@aliel.fr Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" X-Spam-Status: No, score=-16.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 From: Ronald Claveau g12a_fclk_div2p5 should be fclk divided by 2.5. The mult has been declared as 1 which results as fclk/5 instead of fclk/2.5. Set mult=2 to get the correct div 2.5 rate. Fixes: 085a4ea93d54 ("clk: meson: g12a: add peripheral clock controller") Signed-off-by: Ronald Claveau --- drivers/clk/meson/g12a.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index d0d4c7b6dc82..4ec5f15daf98 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -995,7 +995,7 @@ static struct clk_regmap g12a_fclk_div7 = { }; static struct clk_fixed_factor g12a_fclk_div2p5_div = { - .mult = 1, + .mult = 2, .div = 5, .hw.init = &(struct clk_init_data){ .name = "fclk_div2p5_div", -- 2.43.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic