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[95.246.144.141]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a359fbb725sm194507095e9.0.2026.10.26.06.29.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Oct 2026 06:29:52 -0700 (PDT) From: Carlo Caione Subject: [PATCH 0/2] Fix rate rounding for Meson read-only dividers Date: Mon, 26 Oct 2026 14:29:43 +0100 Message-Id: <20261026-upstream-clk-regmap-ro-divider-v1-0-c8216b0fb93a@baylibre.com> X-Archived-By: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAAAAAAAC/yXNwQ6CMBCE4Vche3YTW6KJvorxUNoprgo0WyAkh He3yGEO3+WflTJUkOleraSYJcvQF5hTRf7l+hYsoZjs2V5NGU8pjwrXsf9+WNF2LrEOHGSWAOV 4A+pLbWMDQyWSFFGW/8HjeThPzRt+3Ku0bT81nJl3ggAAAA== X-Change-ID: 20261026-upstream-clk-regmap-ro-divider-f9ee3532fbe1 To: Neil Armstrong , Jerome Brunet , Stephen Boyd , Brian Masney , Kevin Hilman , Martin Blumenstingl Cc: linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Carlo Caione X-Mailer: b4 0.16.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261026_062955_985863_D5CCFD36 X-CRM114-Status: UNSURE ( 7.24 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.1 (--) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" X-Spam-Status: No, score=-17.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Meson read-only dividers can round a requested rate using a divisor they cannot program. The clock core may then adjust child clocks using the wrong parent rate. This series uses the divisor already set in hardware. The first patch adds a missing /4 entry to the GXL and G12A HDMI divider tables so that all their register values can be read correctly. Signed-off-by: Carlo Caione --- Carlo Caione (2): clk: meson: add the missing HDMI divider /4 alias clk: meson: regmap: use the current divisor for read-only clocks drivers/clk/meson/clk-regmap.c | 34 +++++++++++++++++++++------------- drivers/clk/meson/g12a.c | 3 ++- drivers/clk/meson/gxbb.c | 3 ++- 3 files changed, 25 insertions(+), 15 deletions(-) --- base-commit: 363f97a1ce635b86be7fd263d56a040fbd87bdbb change-id: 20261026-upstream-clk-regmap-ro-divider-f9ee3532fbe1 Best regards, -- Carlo Caione _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic