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[95.246.144.141]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48e3ebc39a8sm35034622f8f.11.2026.10.29.05.54.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Oct 2026 05:54:26 -0700 (PDT) From: Carlo Caione Subject: [PATCH v2 0/3] Fix rate rounding for Meson read-only dividers Date: Thu, 29 Oct 2026 13:54:18 +0100 Message-Id: <20261029-upstream-clk-regmap-ro-divider-v2-0-7a375fd8f88e@baylibre.com> X-Archived-By: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAAAAAAAC/42OQQ6CMBBFr0K6dgwtkYgr72FYtGUKo2DJFBoJ4 e4WvICLv3jJz/t/FQGZMIhbtgrGSIH8O4E6ZcJ2+t0iUJNYqFyVMgXmMUyMegDbv4CxHfQI7KG hSA0yuAqxuBTKGZQiSUZGR59j4FH/OMzmiXbarXujozB5Xo4HUe69v8eihBzsVcnS5M5Uhb4bv fRkGM/WD6Letu0LaX4K6uEAAAA= X-Change-ID: 20261026-upstream-clk-regmap-ro-divider-f9ee3532fbe1 To: Neil Armstrong , Jerome Brunet , Stephen Boyd , Brian Masney , Kevin Hilman , Martin Blumenstingl Cc: linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Carlo Caione X-Mailer: b4 0.16.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261029_055430_763898_78D79F80 X-CRM114-Status: UNSURE ( 8.46 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.1 (--) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" X-Spam-Status: No, score=-16.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 Meson read-only dividers can round a requested rate using a divisor they cannot program. The clock core may then adjust child clocks using the wrong parent rate. This series uses the divisor already set in hardware. The first two patches add a missing /4 entry to the GXL and G12A HDMI divider tables so that all their register values can be read correctly. Signed-off-by: Carlo Caione --- Changes in v2: - Split the HDMI divider table fix per SoC and add Fixes tags (Jerome) - Add a Fixes tag to the clk-regmap patch (Jerome) - Add Jerome's Reviewed-by - Link to v1: https://patch.msgid.link/20261026-upstream-clk-regmap-ro-divider-v1-0-c8216b0fb93a@baylibre.com --- Carlo Caione (3): clk: meson: gxbb: add the missing HDMI divider /4 alias clk: meson: g12a: add the missing HDMI divider /4 alias clk: meson: regmap: use the current divisor for read-only clocks drivers/clk/meson/clk-regmap.c | 34 +++++++++++++++++++++------------- drivers/clk/meson/g12a.c | 3 ++- drivers/clk/meson/gxbb.c | 3 ++- 3 files changed, 25 insertions(+), 15 deletions(-) --- base-commit: 363f97a1ce635b86be7fd263d56a040fbd87bdbb change-id: 20261026-upstream-clk-regmap-ro-divider-f9ee3532fbe1 Best regards, -- Carlo Caione _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic