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[2a02:3100:b1d0:8200:f22f:74ff:fe21:725]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-48e71b725a2sm20540521f8f.13.2026.11.02.13.28.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Nov 2026 13:28:55 -0800 (PST) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, neil.armstrong@linaro.org, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, Martin Blumenstingl Subject: [PATCH re-send] drm/meson: add support for higher bandwidth HDMI DTDs Date: Mon, 2 Nov 2026 22:28:43 +0100 Message-ID: <20261102212843.1213021-1-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.56.0 X-Archived-By: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261102_132858_284727_BA7E50B9 X-CRM114-Status: GOOD ( 16.39 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 There's a report from a user with a DELL U3415W monitor and a Khadas VIM3 stating that 3440x1440@50Hz works but 3440x1440@60Hz doesn't. edid-decode Detailed Timing Descriptor (DTD) extract of that mode: DTD 1: 3440x1440 59.972616 Hz 43:18 88.819 kHz 319.750000 MHz Hfront 80 Hsync 32 Hback 48 Hpol P Vfront 28 Vsync 10 Vback 3 Vpol N Those high clock rates are currently not supported by the meson_vclk code as it limits the PLL OD (output divider) to a minimum of 2. The formula to calculate the clock internally is (ignoring fractional dividers): 319.750MHz * 10 * od = 24MHz * m With od = 2 this results in m = 266, which is outside the supported range of the PLL on G12A SoCs (the driver limits m to 106..247). Using od = 2 results in m = 133, which is supported. Allow the driver to pick OD = 1 to gain support for modes such as 3440x1440@60Hz. Link: https://forum.khadas.com/t/can-not-set-display-resolution-to-3440x1440-for-dell-monitor/26271/12 Signed-off-by: Martin Blumenstingl --- Re-send of [0] which seems to have slipped through. [0] https://lore.kernel.org/linux-amlogic/20260109204836.790096-1-martin.blumenstingl@googlemail.com/ drivers/gpu/drm/meson/meson_vclk.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/meson/meson_vclk.c b/drivers/gpu/drm/meson/meson_vclk.c index dfe0c28a0f05..c0be0b7655bf 100644 --- a/drivers/gpu/drm/meson/meson_vclk.c +++ b/drivers/gpu/drm/meson/meson_vclk.c @@ -700,8 +700,8 @@ static bool meson_hdmi_pll_find_params(struct meson_drm *priv, unsigned int *frac, unsigned int *od) { - /* Cycle from /16 to /2 */ - for (*od = 16 ; *od > 1 ; *od >>= 1) { + /* Cycle from /16 to /1 */ + for (*od = 16 ; *od > 0 ; *od >>= 1) { *m = meson_hdmi_pll_get_m(priv, freq * *od); if (!*m) continue; @@ -750,7 +750,7 @@ static void meson_hdmi_pll_generic_set(struct meson_drm *priv, /* OD2 goes to the PHY, and needs to be *10, so keep OD3=1 */ od3 = 1; if (od < 4) { - od1 = 2; + od1 = od; od2 = 1; } else { od2 = od / 4; -- 2.56.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic