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[95.246.144.141]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-492d8472969sm2366839f8f.58.2026.11.06.00.30.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Nov 2026 00:30:34 -0800 (PST) From: Carlo Caione Date: Fri, 06 Nov 2026 09:30:25 +0100 Subject: [PATCH 2/7] clk: meson: pll: Support PLLs without a pre-divider X-Archived-By: MIME-Version: 1.0 Message-Id: <20261106-upstream-s7-clk-v1-2-7d501d62621f@baylibre.com> References: <20261106-upstream-s7-clk-v1-0-7d501d62621f@baylibre.com> In-Reply-To: <20261106-upstream-s7-clk-v1-0-7d501d62621f@baylibre.com> To: Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Jerome Brunet , Kevin Hilman , Martin Blumenstingl , Carlo Caione Cc: Jian Hu , Chuan Liu , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.16.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261106_003036_679728_955A5F2B X-CRM114-Status: GOOD ( 12.42 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" X-Spam-Status: No, score=-16.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 The common PLL code assumes that every PLL has a pre-divider. This does not hold for the S7 HDMI PLL, and the S7 GP0 and HIFI PLLs are meant to run with theirs set to 1. Make the pre-divider optional so these PLLs can use the common implementation. Signed-off-by: Carlo Caione --- drivers/clk/meson/clk-pll.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c index 1ea6579a760f..44b33051405f 100644 --- a/drivers/clk/meson/clk-pll.c +++ b/drivers/clk/meson/clk-pll.c @@ -76,7 +76,9 @@ static unsigned long meson_clk_pll_recalc_rate(struct clk_hw *hw, struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); unsigned int m, n, frac; - n = meson_parm_read(clk->map, &pll->n); + n = MESON_PARM_APPLICABLE(&pll->n) ? + meson_parm_read(clk->map, &pll->n) : + 1; /* * On some HW, N is set to zero on init. This value is invalid as @@ -174,7 +176,7 @@ static int meson_clk_get_pll_range_index(unsigned long rate, *n = index + 1; /* Check the predivider range */ - if (*n >= (1 << pll->n.width)) + if (*n >= (MESON_PARM_APPLICABLE(&pll->n) ? 1 << pll->n.width : 2)) return -EINVAL; if (*n == 1) { @@ -437,7 +439,8 @@ static int meson_clk_pll_set_rate(struct clk_hw *hw, unsigned long rate, if (enabled) meson_clk_pll_disable(hw); - meson_parm_write(clk->map, &pll->n, n); + if (MESON_PARM_APPLICABLE(&pll->n)) + meson_parm_write(clk->map, &pll->n, n); meson_parm_write(clk->map, &pll->m, m); if (MESON_PARM_APPLICABLE(&pll->frac)) { -- 2.56.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic