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[95.246.144.141]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-492d8472969sm2366839f8f.58.2026.11.06.00.30.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Nov 2026 00:30:35 -0800 (PST) From: Carlo Caione Date: Fri, 06 Nov 2026 09:30:26 +0100 Subject: [PATCH 3/7] clk: meson: pll: Support active-low resets X-Archived-By: MIME-Version: 1.0 Message-Id: <20261106-upstream-s7-clk-v1-3-7d501d62621f@baylibre.com> References: <20261106-upstream-s7-clk-v1-0-7d501d62621f@baylibre.com> In-Reply-To: <20261106-upstream-s7-clk-v1-0-7d501d62621f@baylibre.com> To: Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Jerome Brunet , Kevin Hilman , Martin Blumenstingl , Carlo Caione Cc: Jian Hu , Chuan Liu , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.16.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261106_003037_875738_3CFD3F7A X-CRM114-Status: GOOD ( 15.60 ) X-Spam-Score: -2.1 (--) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" X-Spam-Status: No, score=-16.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 The common PLL code assumes that the reset of a PLL is active high. The S7 HDMI PLL has an active-low reset, and its lock flag only rises reliably when the PLL goes through it. Add a flag for PLLs with an active-low reset so this PLL can use the common implementation. Signed-off-by: Carlo Caione --- drivers/clk/meson/clk-pll.c | 43 +++++++++++++++++++++++++++++++------------ drivers/clk/meson/clk-pll.h | 1 + 2 files changed, 32 insertions(+), 12 deletions(-) diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c index 44b33051405f..4ac5e45c1e9b 100644 --- a/drivers/clk/meson/clk-pll.c +++ b/drivers/clk/meson/clk-pll.c @@ -293,13 +293,37 @@ static int meson_clk_pll_wait_lock(struct clk_hw *hw) return -ETIMEDOUT; } +static bool meson_clk_pll_in_reset(struct clk_regmap *clk, + struct meson_clk_pll_data *pll) +{ + unsigned int rst; + + if (!MESON_PARM_APPLICABLE(&pll->rst)) + return false; + + rst = meson_parm_read(clk->map, &pll->rst); + + return pll->flags & CLK_MESON_PLL_RST_ACTIVE_LOW ? !rst : rst; +} + +static void meson_clk_pll_reset(struct clk_regmap *clk, + struct meson_clk_pll_data *pll, bool reset) +{ + if (!MESON_PARM_APPLICABLE(&pll->rst)) + return; + + if (pll->flags & CLK_MESON_PLL_RST_ACTIVE_LOW) + reset = !reset; + + meson_parm_write(clk->map, &pll->rst, reset); +} + static int meson_clk_pll_is_enabled(struct clk_hw *hw) { struct clk_regmap *clk = to_clk_regmap(hw); struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); - if (MESON_PARM_APPLICABLE(&pll->rst) && - meson_parm_read(clk->map, &pll->rst)) + if (meson_clk_pll_in_reset(clk, pll)) return 0; if (!meson_parm_read(clk->map, &pll->en) || @@ -328,14 +352,12 @@ static int meson_clk_pll_init(struct clk_hw *hw) return 0; if (pll->init_count) { - if (MESON_PARM_APPLICABLE(&pll->rst)) - meson_parm_write(clk->map, &pll->rst, 1); + meson_clk_pll_reset(clk, pll, true); regmap_multi_reg_write(clk->map, pll->init_regs, pll->init_count); - if (MESON_PARM_APPLICABLE(&pll->rst)) - meson_parm_write(clk->map, &pll->rst, 0); + meson_clk_pll_reset(clk, pll, false); } return 0; @@ -365,15 +387,13 @@ static int meson_clk_pll_enable(struct clk_hw *hw) return 0; /* Make sure the pll is in reset */ - if (MESON_PARM_APPLICABLE(&pll->rst)) - meson_parm_write(clk->map, &pll->rst, 1); + meson_clk_pll_reset(clk, pll, true); /* Enable the pll */ meson_parm_write(clk->map, &pll->en, 1); /* Take the pll out reset */ - if (MESON_PARM_APPLICABLE(&pll->rst)) - meson_parm_write(clk->map, &pll->rst, 0); + meson_clk_pll_reset(clk, pll, false); /* * Compared with the previous SoCs, self-adaption current module @@ -406,8 +426,7 @@ static void meson_clk_pll_disable(struct clk_hw *hw) struct meson_clk_pll_data *pll = meson_clk_pll_data(clk); /* Put the pll is in reset */ - if (MESON_PARM_APPLICABLE(&pll->rst)) - meson_parm_write(clk->map, &pll->rst, 1); + meson_clk_pll_reset(clk, pll, true); /* Disable the pll */ meson_parm_write(clk->map, &pll->en, 0); diff --git a/drivers/clk/meson/clk-pll.h b/drivers/clk/meson/clk-pll.h index 949157fb7bf5..8384b75ae38d 100644 --- a/drivers/clk/meson/clk-pll.h +++ b/drivers/clk/meson/clk-pll.h @@ -29,6 +29,7 @@ struct pll_mult_range { #define CLK_MESON_PLL_ROUND_CLOSEST BIT(0) #define CLK_MESON_PLL_NOINIT_ENABLED BIT(1) +#define CLK_MESON_PLL_RST_ACTIVE_LOW BIT(2) struct meson_clk_pll_data { struct parm en; -- 2.56.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic