Re: [PATCH 2/2] arm64: dts: amlogic: s4: fix mmc clock assignment

[Chuan Liu <chuan.liu@amlogic.com>]

hi Jerome,

On 1/13/2026 6:39 PM, Jerome Brunet wrote:
> [ EXTERNAL EMAIL ]
> 
> MMC A and C are mis-represented as having their "clkin0" input connected to
> xtal while it is actually connected to the MMC clock, mostly in an attempt
> to provide 24MHz to the device on this input.

Right.

> 
> Fix this and assign the clock to 24MHz to actually provide the required
> rate.
> 
> Fixes: 3ab9d54b5d84 ("arm64: dts: amlogic: enable some device nodes for S4")
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
>   arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 12 ++++++++++--
>   1 file changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> index 62538fd9db6b1ffb33a88e12628aadefbaa453ec..6324d1eb5994009df5b09923cce373a87229f4b8 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> @@ -819,13 +819,17 @@ sdio: mmc@fe088000 {
>                          reg = <0x0 0xfe088000 0x0 0x800>;
>                          interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
>                          clocks = <&clkc_periphs CLKID_SDEMMC_A>,
> -                                <&xtal>,
> +                                <&clkc_periphs CLKID_SD_EMMC_A>,
>                                   <&clkc_pll CLKID_FCLK_DIV2>;
>                          clock-names = "core", "clkin0", "clkin1";
>                          resets = <&reset RESET_SD_EMMC_A>;
>                          cap-sdio-irq;
>                          keep-power-in-suspend;
>                          status = "disabled";
> +
> +                       assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_A>;
> +                       assigned-clock-parents = <0>;

Is it possible to remove assigned-clock-parent?

> +                       assigned-clock-rates = <24000000>;
>                  };
> 
>                  sd: mmc@fe08a000 {
> @@ -849,13 +853,17 @@ emmc: mmc@fe08c000 {
>                          reg = <0x0 0xfe08c000 0x0 0x800>;
>                          interrupts = <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>;
>                          clocks = <&clkc_periphs CLKID_NAND>,
> -                                <&xtal>,
> +                                <&clkc_periphs CLKID_SD_EMMC_C>,
>                                   <&clkc_pll CLKID_FCLK_DIV2>;
>                          clock-names = "core", "clkin0", "clkin1";
>                          resets = <&reset RESET_NAND_EMMC>;
>                          no-sdio;
>                          no-sd;
>                          status = "disabled";
> +
> +                       assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_C>;
> +                       assigned-clock-parents = <0>;
> +                       assigned-clock-rates = <24000000>;
>                  };
>          };
>   };
> 
> --
> 2.47.3
> 
> 
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