Re: [PATCH/RFT] soc: amlogic: meson-gx-pwrc-vpu: switch to clk_bulk

[Neil Armstrong <narmstrong@baylibre.com>]

Hi,

On 14/08/2019 00:47, Kevin Hilman wrote:
> Hi Neil,
> 
> Kevin Hilman <khilman@baylibre.com> writes:
> 
>> Instead of expecting a specific number of clocks with specific clock
>> names, switch to using the bulk clock API.
>>
>> This is a first step towards generalizing this driver to work with
>> other domains.
>>
>> Cc: Neil Armstrong <narmstrong@baylibre.com>
>> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
>> ---
>> Boot tested on meson-g12a-sei510 and verified that framebuffer console
>> comes up and still works.
>>
>>  drivers/soc/amlogic/meson-gx-pwrc-vpu.c | 41 ++++++-------------------
>>  1 file changed, 10 insertions(+), 31 deletions(-)
>>
>> diff --git a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c
>> index 511b6856225d..5f6519f43a31 100644
>> --- a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c
>> +++ b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c
>> @@ -34,8 +34,8 @@ struct meson_gx_pwrc_vpu {
>>  	struct regmap *regmap_ao;
>>  	struct regmap *regmap_hhi;
>>  	struct reset_control *rstc;
>> -	struct clk *vpu_clk;
>> -	struct clk *vapb_clk;
>> +	struct clk_bulk_data *clks;
>> +	int num_clks;
>>  };
>>  
>>  static inline
>> @@ -76,8 +76,7 @@ static int meson_gx_pwrc_vpu_power_off(struct generic_pm_domain *genpd)
>>  
>>  	msleep(20);
>>  
>> -	clk_disable_unprepare(pd->vpu_clk);
>> -	clk_disable_unprepare(pd->vapb_clk);
>> +	clk_bulk_disable_unprepare(pd->num_clks, pd->clks);
> 
> Note the original turn-off order here is VPU then VAPB...
> 
>>  	return 0;
>>  }
>> @@ -119,25 +118,14 @@ static int meson_g12a_pwrc_vpu_power_off(struct generic_pm_domain *genpd)
>>  
>>  	msleep(20);
>>  
>> -	clk_disable_unprepare(pd->vpu_clk);
>> -	clk_disable_unprepare(pd->vapb_clk);
>> +	clk_bulk_disable_unprepare(pd->num_clks, pd->clks);
> 
> ... and the origianl turn-on ordr is also VPU then VAPB.
> 
> Using the clock bulk API, the new turn-on order will be the order they
> clocks appear in DT.  The turn-off order will be the reverse of that.
> 
> That seems right to me, but it is a change in behavior from the current
> code.
> 
> Did you set the enable and disable ordering the same for any specific
> reason?  Any reason to thing reversing the disable order is going to
> cause any issues?

No the order is not an issue here, the 2 clocks feeds 2 different parts of the VPU,
one is the APB register bridge (vapb) and the other feeds the vpu video pipeline,
so the order is not an issue.

Neil

> 
> Thanks,
> 
> Kevin
> 


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