From: Robin Murphy <robin.murphy@arm.com>
To: will@kernel.org, robh@kernel.org, tomeu.vizoso@collabora.com,
steven.price@arm.com, alyssa.rosenzweig@collabora.com,
khilman@baylibre.com, narmstrong@baylibre.com,
jbrunet@baylibre.com
Cc: linux-amlogic@lists.infradead.org,
iommu@lists.linux-foundation.org,
dri-devel@lists.freedesktop.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] drm/panfrost: Support cache-coherent integrations
Date: Wed, 16 Sep 2020 00:51:06 +0100 [thread overview]
Message-ID: <52dbcdfd15d804f35ba8c984c650144782f762da.1600213517.git.robin.murphy@arm.com> (raw)
In-Reply-To: <cover.1600213517.git.robin.murphy@arm.com>
When the GPU's ACE-Lite interface is fully wired up and capable of
snooping CPU caches, it may be described as "dma-coherent" in
devicetree, which will already inform the DMA layer not to perform
unnecessary cache maintenance. However, we still need to ensure that
the GPU uses the appropriate cacheable outer-shareable attributes in
order to generate the requisite snoop signals, and that CPU mappings
don't create a mismatch by using a non-cacheable type either.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
drivers/gpu/drm/panfrost/panfrost_device.h | 1 +
drivers/gpu/drm/panfrost/panfrost_drv.c | 2 ++
drivers/gpu/drm/panfrost/panfrost_gem.c | 2 ++
drivers/gpu/drm/panfrost/panfrost_mmu.c | 1 +
4 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h
index c30c719a8059..b31f45315e96 100644
--- a/drivers/gpu/drm/panfrost/panfrost_device.h
+++ b/drivers/gpu/drm/panfrost/panfrost_device.h
@@ -84,6 +84,7 @@ struct panfrost_device {
/* pm_domains for devices with more than one. */
struct device *pm_domain_devs[MAX_PM_DOMAINS];
struct device_link *pm_domain_links[MAX_PM_DOMAINS];
+ bool coherent;
struct panfrost_features features;
const struct panfrost_compatible *comp;
diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c
index ada51df9a7a3..2a6f2f716b2f 100644
--- a/drivers/gpu/drm/panfrost/panfrost_drv.c
+++ b/drivers/gpu/drm/panfrost/panfrost_drv.c
@@ -588,6 +588,8 @@ static int panfrost_probe(struct platform_device *pdev)
if (!pfdev->comp)
return -ENODEV;
+ pfdev->coherent = device_get_dma_attr(&pdev->dev) == DEV_DMA_COHERENT;
+
/* Allocate and initialze the DRM device. */
ddev = drm_dev_alloc(&panfrost_drm_driver, &pdev->dev);
if (IS_ERR(ddev))
diff --git a/drivers/gpu/drm/panfrost/panfrost_gem.c b/drivers/gpu/drm/panfrost/panfrost_gem.c
index 33355dd302f1..cdf1a8754eba 100644
--- a/drivers/gpu/drm/panfrost/panfrost_gem.c
+++ b/drivers/gpu/drm/panfrost/panfrost_gem.c
@@ -220,6 +220,7 @@ static const struct drm_gem_object_funcs panfrost_gem_funcs = {
*/
struct drm_gem_object *panfrost_gem_create_object(struct drm_device *dev, size_t size)
{
+ struct panfrost_device *pfdev = dev->dev_private;
struct panfrost_gem_object *obj;
obj = kzalloc(sizeof(*obj), GFP_KERNEL);
@@ -229,6 +230,7 @@ struct drm_gem_object *panfrost_gem_create_object(struct drm_device *dev, size_t
INIT_LIST_HEAD(&obj->mappings.list);
mutex_init(&obj->mappings.lock);
obj->base.base.funcs = &panfrost_gem_funcs;
+ obj->base.map_cached = pfdev->coherent;
return &obj->base.base;
}
diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c
index e8f7b11352d2..8852fd378f7a 100644
--- a/drivers/gpu/drm/panfrost/panfrost_mmu.c
+++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c
@@ -371,6 +371,7 @@ int panfrost_mmu_pgtable_alloc(struct panfrost_file_priv *priv)
.pgsize_bitmap = SZ_4K | SZ_2M,
.ias = FIELD_GET(0xff, pfdev->features.mmu_features),
.oas = FIELD_GET(0xff00, pfdev->features.mmu_features),
+ .coherent_walk = pfdev->coherent,
.tlb = &mmu_tlb_ops,
.iommu_dev = pfdev->dev,
};
--
2.28.0.dirty
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next prev parent reply other threads:[~2020-09-15 23:51 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-15 23:51 [PATCH 0/3] drm: panfrost: Coherency support Robin Murphy
2020-09-15 23:51 ` [PATCH 1/3] iommu/io-pgtable-arm: Support coherency for Mali LPAE Robin Murphy
2020-09-21 17:57 ` Will Deacon
2020-09-21 21:53 ` Robin Murphy
2020-09-21 22:24 ` Will Deacon
2020-09-15 23:51 ` Robin Murphy [this message]
2020-09-17 10:37 ` [PATCH 2/3] drm/panfrost: Support cache-coherent integrations Steven Price
2020-09-15 23:51 ` [PATCH 3/3] arm64: dts: meson: Describe G12b GPU as coherent Robin Murphy
2020-09-16 8:26 ` Neil Armstrong
2020-10-05 8:15 ` Boris Brezillon
2020-10-05 8:34 ` Steven Price
2020-10-05 8:39 ` Boris Brezillon
2020-10-05 10:05 ` Steven Price
2020-09-16 14:54 ` Neil Armstrong
2020-09-16 14:54 ` [PATCH 0/3] drm: panfrost: Coherency support Neil Armstrong
2020-09-16 17:04 ` Alyssa Rosenzweig
2020-09-16 17:46 ` Rob Herring
2020-09-17 10:38 ` Steven Price
2020-09-17 10:51 ` Tomeu Vizoso
2020-09-17 11:00 ` Steven Price
2020-09-17 12:03 ` Alyssa Rosenzweig
2020-09-17 12:38 ` Robin Murphy
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