From: Neil Armstrong <neil.armstrong@linaro.org>
To: "Geert Uytterhoeven" <geert+renesas@glider.be>,
"Marc Zyngier" <marc.zyngier@arm.com>,
"Kevin Hilman" <khilman@baylibre.com>,
"Jerome Brunet" <jbrunet@baylibre.com>,
"Martin Blumenstingl" <martin.blumenstingl@googlemail.com>,
"Peter Griffin" <peter.griffin@linaro.org>,
"André Draszik" <andre.draszik@linaro.org>,
"Tudor Ambarus" <tudor.ambarus@linaro.org>,
"Alim Akhtar" <alim.akhtar@samsung.com>,
"Frank Li" <Frank.Li@nxp.com>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
"Fabio Estevam" <festevam@gmail.com>,
"Dinh Nguyen" <dinguyen@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konradybcio@kernel.org>,
"Thierry Reding" <treding@nvidia.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, imx@lists.linux.dev,
linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/7] arm64: dts: amlogic: s6: Drop CPU masks from GICv3 PPI interrupts
Date: Fri, 6 Mar 2026 11:12:18 +0100 [thread overview]
Message-ID: <6b4ea910-1a73-421e-8a38-8827a506b937@linaro.org> (raw)
In-Reply-To: <f9c6eddebebcd2e128edd2dbc51706e23589f9e8.1772643434.git.geert+renesas@glider.be>
On 3/4/26 18:10, Geert Uytterhoeven wrote:
> Unlike older GIC variants, the GICv3 DT bindings do not support
> specifying a CPU mask in PPI interrupt specifiers. Drop the masks.
> While at it, replace the magic number for IRQ_TYPE_LEVEL_HIGH by its
> symbolic definition.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi
> index 8ef6319390331fcf..ab3acef2b147e62c 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi
> @@ -53,10 +53,10 @@ pwrc: power-controller {
>
> timer {
> compatible = "arm,armv8-timer";
> - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
> };
>
> psci {
> @@ -84,7 +84,7 @@ gic: interrupt-controller@ff200000 {
> interrupt-controller;
> reg = <0x0 0xff200000 0 0x10000>,
> <0x0 0xff240000 0 0x80000>;
> - interrupts = <GIC_PPI 9 0xf04>;
> + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> apb: bus@fe000000 {
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Thanks,
Neil
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next prev parent reply other threads:[~2026-03-06 10:12 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-04 17:10 [PATCH 0/7] arm64: dts: " Geert Uytterhoeven
2026-03-04 17:10 ` [PATCH 1/7] arm64: dts: amlogic: s6: " Geert Uytterhoeven
2026-03-06 10:12 ` Neil Armstrong [this message]
2026-03-04 17:10 ` [PATCH 2/7] arm64: dts: exynos: gs101: " Geert Uytterhoeven
2026-03-04 17:11 ` [PATCH 3/7] arm64: dts: fsl-ls1028a: " Geert Uytterhoeven
2026-03-04 17:11 ` [PATCH 4/7] arm64: dts: freescale: imx: " Geert Uytterhoeven
2026-03-04 17:11 ` [PATCH 5/7] arm64: dts: intel: agilex5: " Geert Uytterhoeven
2026-03-11 2:12 ` Dinh Nguyen
2026-03-04 17:11 ` [PATCH 6/7] arm64: tegra: " Geert Uytterhoeven
2026-03-04 17:11 ` [PATCH 7/7] arm64: dts: qcom: " Geert Uytterhoeven
2026-03-05 10:02 ` Konrad Dybcio
2026-03-05 9:33 ` [PATCH 0/7] arm64: dts: " Konrad Dybcio
2026-03-05 9:55 ` Geert Uytterhoeven
2026-03-05 10:02 ` Konrad Dybcio
2026-03-05 11:03 ` Marc Zyngier
2026-03-24 14:56 ` (subset) " Frank Li
2026-03-26 3:19 ` Bjorn Andersson
2026-03-26 8:58 ` Neil Armstrong
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