From: neil.armstrong@linaro.org
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Dmitry Rokosov <ddrokosov@sberdevices.ru>
Cc: jbrunet@baylibre.com, mturquette@baylibre.com, sboyd@kernel.org,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
khilman@baylibre.com, martin.blumenstingl@googlemail.com,
jian.hu@amlogic.com, kernel@sberdevices.ru, rockosov@gmail.com,
linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v10 3/5] dt-bindings: clock: meson: add A1 PLL and Peripherals clkcs bindings
Date: Tue, 14 Mar 2023 16:40:19 +0100 [thread overview]
Message-ID: <6b7ae52c-d84d-8d08-139c-5c67ec363e85@linaro.org> (raw)
In-Reply-To: <21add21d-4afe-7840-6c49-3786f82761d9@linaro.org>
On 14/03/2023 16:37, Krzysztof Kozlowski wrote:
> On 14/03/2023 16:33, neil.armstrong@linaro.org wrote:
>>> There are many ways - depend on your driver. For example like this:
>>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/clk/samsung/clk-exynos5420.c#n975
>>>
>>> The first argument is the clock ID (or ignore).
>>>
>>> BTW, quite likely the problem is generic to all Meson clock drivers.
>>
>> This issue about "public" non-continuous defined was already discussed at https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/
>>
>> I don't see what's different with this one.
>
> So you are aware that all undocumented clock IDs are still allowed to
> use in DTS and they are ABI? Changing them will be an ABI break.
Yes of course.
Neil
>
> Best regards,
> Krzysztof
>
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next prev parent reply other threads:[~2023-03-14 15:40 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-13 20:12 [PATCH v10 0/5] add Amlogic A1 clock controller drivers Dmitry Rokosov
2023-03-13 20:12 ` [PATCH v10 1/5] clk: meson: make pll rst bit as optional Dmitry Rokosov
2023-03-13 20:12 ` [PATCH v10 2/5] clk: meson: introduce new pll power-on sequence for A1 SoC family Dmitry Rokosov
2023-03-13 20:12 ` [PATCH v10 3/5] dt-bindings: clock: meson: add A1 PLL and Peripherals clkcs bindings Dmitry Rokosov
2023-03-14 11:28 ` Krzysztof Kozlowski
2023-03-14 11:48 ` Dmitry Rokosov
2023-03-14 14:05 ` Krzysztof Kozlowski
2023-03-14 15:01 ` Dmitry Rokosov
2023-03-14 15:19 ` Krzysztof Kozlowski
2023-03-14 15:33 ` neil.armstrong
2023-03-14 15:37 ` Krzysztof Kozlowski
2023-03-14 15:40 ` neil.armstrong [this message]
2023-03-14 15:56 ` Dmitry Rokosov
2023-03-14 16:37 ` Krzysztof Kozlowski
2023-03-14 19:28 ` Dmitry Rokosov
2023-03-14 16:02 ` Dmitry Rokosov
2023-03-17 18:53 ` Rob Herring
2023-03-17 20:27 ` Dmitry Rokosov
2023-03-13 20:12 ` [PATCH v10 4/5] clk: meson: a1: add Amlogic A1 PLL clock controller driver Dmitry Rokosov
2023-03-13 20:12 ` [PATCH v10 5/5] clk: meson: a1: add Amlogic A1 Peripherals " Dmitry Rokosov
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