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([2a01:e0a:982:cbb0:feeb:faed:66fa:9e6a]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3674369eb94sm1595939f8f.98.2024.06.27.04.55.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 27 Jun 2024 04:55:59 -0700 (PDT) Message-ID: <6c9a791b-aaef-4ad0-a10d-ec3acb42ac32@linaro.org> Date: Thu, 27 Jun 2024 13:55:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Neil Armstrong Subject: Re: [PATCH 2/3] pmdomain: amlogic: Add support for A5 power domains controller To: xianwei.zhao@amlogic.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Jianxin Pan , Ulf Hansson Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Hongyu Chen References: <20240627-a5_secpower-v1-0-1f47dde1270c@amlogic.com> <20240627-a5_secpower-v1-2-1f47dde1270c@amlogic.com> Content-Language: en-US, fr Autocrypt: addr=neil.armstrong@linaro.org; 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charset="us-ascii"; Format="flowed" Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On 27/06/2024 13:47, Xianwei Zhao via B4 Relay wrote: > From: Xianwei Zhao > > Add support for the A5 power controller, whose registers are > in the secure domain and should be accessed via SMC. > > Signed-off-by: Hongyu Chen > Signed-off-by: Xianwei Zhao > --- > drivers/pmdomain/amlogic/meson-secure-pwrc.c | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > > diff --git a/drivers/pmdomain/amlogic/meson-secure-pwrc.c b/drivers/pmdomain/amlogic/meson-secure-pwrc.c > index df5567418226..f6729eea6b8c 100644 > --- a/drivers/pmdomain/amlogic/meson-secure-pwrc.c > +++ b/drivers/pmdomain/amlogic/meson-secure-pwrc.c > @@ -15,6 +15,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -155,6 +156,22 @@ static struct meson_secure_pwrc_domain_desc a4_pwrc_domains[] = { > SEC_PD(A4_AO_IR, GENPD_FLAG_ALWAYS_ON), > }; > > +static struct meson_secure_pwrc_domain_desc a5_pwrc_domains[] = { > + SEC_PD(A5_NNA, 0), > + SEC_PD(A5_AUDIO, 0), > + SEC_PD(A5_SDIOA, 0), > + SEC_PD(A5_EMMC, 0), > + SEC_PD(A5_USB_COMB, 0), > + SEC_PD(A5_ETH, 0), > + SEC_PD(A5_RSA, 0), > + SEC_PD(A5_AUDIO_PDM, 0), > + /* DMC is for DDR PHY ana/dig and DMC, and should be always on */ > + SEC_PD(A5_DMC, GENPD_FLAG_ALWAYS_ON), > + /* WRAP is secure_top, a lot of modules are included, and should be always on */ > + SEC_PD(A5_SYS_WRAP, GENPD_FLAG_ALWAYS_ON), > + SEC_PD(A5_DSPA, 0), > +}; > + > static struct meson_secure_pwrc_domain_desc c3_pwrc_domains[] = { > SEC_PD(C3_NNA, 0), > SEC_PD(C3_AUDIO, 0), > @@ -335,6 +352,11 @@ static struct meson_secure_pwrc_domain_data amlogic_secure_a4_pwrc_data = { > .count = ARRAY_SIZE(a4_pwrc_domains), > }; > > +static struct meson_secure_pwrc_domain_data amlogic_secure_a5_pwrc_data = { > + .domains = a5_pwrc_domains, > + .count = ARRAY_SIZE(a5_pwrc_domains), > +}; > + > static struct meson_secure_pwrc_domain_data amlogic_secure_c3_pwrc_data = { > .domains = c3_pwrc_domains, > .count = ARRAY_SIZE(c3_pwrc_domains), > @@ -359,6 +381,10 @@ static const struct of_device_id meson_secure_pwrc_match_table[] = { > .compatible = "amlogic,a4-pwrc", > .data = &amlogic_secure_a4_pwrc_data, > }, > + { > + .compatible = "amlogic,a5-pwrc", > + .data = &amlogic_secure_a5_pwrc_data, > + }, > { > .compatible = "amlogic,c3-pwrc", > .data = &amlogic_secure_c3_pwrc_data, > Reviewed-by: Neil Armstrong _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic