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[71.197.186.152]) by smtp.gmail.com with ESMTPSA id z12-20020aa785cc000000b0050dc762818bsm1714033pfn.101.2022.05.26.09.28.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 May 2022 09:28:49 -0700 (PDT) From: Kevin Hilman To: Liang Yang , Miquel Raynal , linux-mtd@lists.infradead.org Cc: Liang Yang , Rob Herring , Richard Weinberger , Vignesh Raghavendra , Jerome Brunet , Neil Armstrong , Martin Blumenstingl , Jianxin Pan , Victor Wan , XianWei Zhao , Kelvin Zhang , BiChao Zheng , YongHui Yu , linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 2/4] mtd: rawnand: meson: fix the clock In-Reply-To: <20220513123404.48513-3-liang.yang@amlogic.com> References: <20220513123404.48513-1-liang.yang@amlogic.com> <20220513123404.48513-3-liang.yang@amlogic.com> Date: Thu, 26 May 2022 09:28:49 -0700 Message-ID: <7hwne88dha.fsf@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220526_092852_243091_A8D869DD X-CRM114-Status: GOOD ( 11.99 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Hi Liang, Liang Yang writes: > EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK' > which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is > the divider and bit6~7 is the mux for fix pll and xtal. At the beginning, > a common MMC and NAND sub-clock was discussed and planed to be implemented > as NFC clock provider, but now this series of patches of a common MMC and > NAND sub-clock are never being accepted. the reasons for giving up are: > 1. EMMC and NAND, which are mutually exclusive anyway > 2. coupling the EMMC and NAND. > 3. it seems that a common MMC and NAND sub-clock is over engineered. > and let us see the link fot more information: > https://lore.kernel.org/all/20220121074508.42168-5-liang.yang@amlogic.com > so The meson nfc can't work now, let us rework the clock. > > Signed-off-by: Liang Yang Reviewed-by: Kevin Hilman Thank you for your persistence in working on multiple iterations of this until we came to a final agreement. Kevin _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic