From: Neil Armstrong <narmstrong@baylibre.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: dri-devel@lists.freedesktop.org,
linux-amlogic@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Jagan Teki <jagan@amarulasolutions.com>
Subject: Re: [PATCH v3 6/6] drm/meson: add support for MIPI-DSI transceiver
Date: Mon, 27 Jun 2022 09:01:01 +0200 [thread overview]
Message-ID: <9cdf2ca0-4f86-09b0-8834-c0c39eb70054@baylibre.com> (raw)
In-Reply-To: <CAFBinCB=RJeaqVi+d6gGAsQTWAU68iFF6T9bXAQVYUWKxgiYaw@mail.gmail.com>
Hi,
On 27/06/2022 00:32, Martin Blumenstingl wrote:
> Hi Neil,
>
> On Fri, Jun 17, 2022 at 9:27 AM Neil Armstrong <narmstrong@baylibre.com> wrote:
>> +/* [31:16] RW intr_stat/clr. Default 0.
>> + * For each bit, read as this interrupt level status,
>> + * write 1 to clear.
> Do you know if an interrupt line from GIC is routed to the MIPI-DSI
> transceiver? If so, we should make it mandatory in patch #1 of this
> series (dt-bindings patch), even though it's not in use by the driver
> at the moment.
Probably yes, let me check
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prev parent reply other threads:[~2022-06-27 7:01 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-17 7:27 [PATCH v3 0/6] drm/meson: add support for MIPI DSI Display Neil Armstrong
2022-06-17 7:27 ` [PATCH v3 1/6] dt-bindings: display: add Amlogic MIPI DSI Host Controller bindings Neil Armstrong
2022-06-17 7:27 ` [PATCH v3 2/6] dt-bindings: display: meson-vpu: add third DPI output port Neil Armstrong
2022-06-17 7:27 ` [PATCH v3 3/6] drm/meson: venc: add ENCL encoder setup for MIPI-DSI output Neil Armstrong
2022-06-17 7:27 ` [PATCH v3 4/6] drm/meson: vclk: add DSI clock config Neil Armstrong
2022-06-17 7:27 ` [PATCH v3 5/6] drm/meson: add DSI encoder Neil Armstrong
2022-06-26 22:33 ` Martin Blumenstingl
2022-06-17 7:27 ` [PATCH v3 6/6] drm/meson: add support for MIPI-DSI transceiver Neil Armstrong
2022-06-26 22:32 ` Martin Blumenstingl
2022-06-27 7:01 ` Neil Armstrong [this message]
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