From mboxrd@z Thu Jan 1 00:00:00 1970 From: narmstrong@baylibre.com (Neil Armstrong) Date: Tue, 13 Nov 2018 14:34:08 +0100 Subject: [PATCH] pinctrl: meson: fix pull enable register calculation In-Reply-To: <20181113105536.6459-1-jbrunet@baylibre.com> References: <20181113105536.6459-1-jbrunet@baylibre.com> Message-ID: To: linus-amlogic@lists.infradead.org List-Id: linus-amlogic.lists.infradead.org On 13/11/2018 11:55, Jerome Brunet wrote: > We just changed the code so we apply bias disable on the correct > register but forgot to align the register calculation. The result > is that we apply the change on the correct register, but possibly > at the incorrect offset/bit > > This went undetected because offsets tends to be the same between > REG_PULL and REG_PULLEN for a given pin the EE controller. This > is not true for the AO controller. > > Fixes: e39f9dd8206a ("pinctrl: meson: fix pinconf bias disable") > Signed-off-by: Jerome Brunet > --- > drivers/pinctrl/meson/pinctrl-meson.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c > index 53d449076dee..ea87d739f534 100644 > --- a/drivers/pinctrl/meson/pinctrl-meson.c > +++ b/drivers/pinctrl/meson/pinctrl-meson.c > @@ -191,7 +191,8 @@ static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin, > case PIN_CONFIG_BIAS_DISABLE: > dev_dbg(pc->dev, "pin %u: disable bias\n", pin); > > - meson_calc_reg_and_bit(bank, pin, REG_PULL, ®, &bit); > + meson_calc_reg_and_bit(bank, pin, REG_PULLEN, ®, > + &bit); > ret = regmap_update_bits(pc->reg_pullen, reg, > BIT(bit), 0); > if (ret) > I saw it aswell, Acked-by: Neil Armstrong