From mboxrd@z Thu Jan 1 00:00:00 1970 From: hkallweit1@gmail.com (Heiner Kallweit) Date: Fri, 12 May 2017 21:13:44 +0200 Subject: [PATCH v2 3/6] pintrl: meson: add DT node for GPIO IRQ on Meson GX In-Reply-To: <36164ed8-aa59-2a77-b7fc-9adce03a2fc1@gmail.com> References: <36164ed8-aa59-2a77-b7fc-9adce03a2fc1@gmail.com> Message-ID: To: linus-amlogic@lists.infradead.org List-Id: linus-amlogic.lists.infradead.org Add the DT node for GPIO IRQ support on AMlogic Meson GX. Signed-off-by: Heiner Kallweit --- v2: - remove syscon --- .../bindings/gpio/amlogic,meson-gpio-interrupt.txt | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/amlogic,meson-gpio-interrupt.txt diff --git a/Documentation/devicetree/bindings/gpio/amlogic,meson-gpio-interrupt.txt b/Documentation/devicetree/bindings/gpio/amlogic,meson-gpio-interrupt.txt new file mode 100644 index 00000000..ba7d3015 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/amlogic,meson-gpio-interrupt.txt @@ -0,0 +1,30 @@ +Amlogic meson GPIO interrupt controller + +Meson SoCs contains an interrupt controller which is able watch the SoC pads +and generate an interrupt on edges or level. The controller is essentially a +256 pads to 8 GIC interrupt multiplexer, with a filter block to select edge +or level and polarity. We don't expose all 256 mux inputs because the +documentation shows that upper part is not mapped to any pad. The actual number +of interrupt exposed depends on the SoC. + +Required properties: + +- compatible : should be "amlogic,meson-gpio-interrupt". +- reg : Specifies base physical address and size of the registers. +- interrupts : list of GIC interrupts which can be used with the + GPIO IRQ multiplexer + +Example: + +gpio_irq at 9880 { + compatible = "amlogic,meson-gpio-interrupt"; + reg = <0x0 0x09880 0x0 0x10>; + interrupts = , + , + , + , + , + , + , + ; + }; -- 2.12.2