From: Jonghwan Choi <jhbird.choi@samsung.com>
To: "'open list'" <linux-kernel@vger.kernel.org>
Cc: "'Amit Daniel Kachhap'" <amit.kachhap@linaro.org>,
"'Guenter Roeck'" <guenter.roeck@ericsson.com>,
"'Sachin Kamat'" <sachin.kamat@linaro.org>
Subject: [PATCH 1/2] thermal: exynos: Fix wrong bit to control tmu core
Date: Tue, 30 Oct 2012 14:30:54 +0900 [thread overview]
Message-ID: <000001cdb65f$bbb93d40$332bb7c0$%choi@samsung.com> (raw)
[0]bit is used to enable/disable tmu core. [1] bit is a reserved bit.
Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
---
drivers/thermal/exynos_thermal.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/exynos_thermal.c
b/drivers/thermal/exynos_thermal.c
index fd03e85..6ce6667 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -53,8 +53,8 @@
#define EXYNOS_TMU_TRIM_TEMP_MASK 0xff
#define EXYNOS_TMU_GAIN_SHIFT 8
#define EXYNOS_TMU_REF_VOLTAGE_SHIFT 24
-#define EXYNOS_TMU_CORE_ON 3
-#define EXYNOS_TMU_CORE_OFF 2
+#define EXYNOS_TMU_CORE_ON 1
+#define EXYNOS_TMU_CORE_OFF 0
#define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET 50
/* Exynos4210 specific registers */
--
1.7.4.1
reply other threads:[~2012-10-30 5:30 UTC|newest]
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