From: Shan-Chun Hung <shanchun1218@gmail.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: ychuang3@nuvoton.com, schung@nuvoton.com, vkoul@kernel.org,
Frank.Li@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, kees@kernel.org, gustavoars@kernel.org,
linux-arm-kernel@lists.infradead.org, dmaengine@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-hardening@vger.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: dma: nuvoton,ma35d1-pdma: Document MA35D1 PDMA controller
Date: Thu, 5 Nov 2026 08:14:41 +0800 [thread overview]
Message-ID: <0093d120-b966-4ece-be57-55a4751e17be@gmail.com> (raw)
In-Reply-To: <20261104-vole-of-legendary-plenty-811cf1@quoll>
Dear Krzysztof,
Thanks for your review.
On 11/4/2026 10:03 PM, Krzysztof Kozlowski wrote:
> On Tue, Nov 03, 2026 at 10:22:01AM +0800, Shan-Chun Hung wrote:
>> Add binding for Nuvoton MA35D1 PDMA controller.
>>
>
> Looks like valid Sashiko review, so only few nits, not a full review:
>
>> Signed-off-by: Shan-Chun Hung <shanchun1218@gmail.com>
>> ---
>> .../bindings/dma/nuvoton,ma35d1-pdma.yaml | 72 +++++++++++
>> include/dt-bindings/dma/ma35d1-pdma.h | 113 ++++++++++++++++++
>> 2 files changed, 185 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/dma/nuvoton,ma35d1-pdma.yaml
>> create mode 100644 include/dt-bindings/dma/ma35d1-pdma.h
>>
>> diff --git a/Documentation/devicetree/bindings/dma/nuvoton,ma35d1-pdma.yaml b/Documentation/devicetree/bindings/dma/nuvoton,ma35d1-pdma.yaml
>> new file mode 100644
>> index 000000000000..cd752571242c
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/dma/nuvoton,ma35d1-pdma.yaml
>> @@ -0,0 +1,72 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/dma/nuvoton,ma35d1-pdma.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Nuvoton MA35D1 PDMA controller
>> +
>> +description:
>> + This describes the devicetree bindings for four Peripheral DMA engines to perform
>
> Do not describe what the binding document is describe. Just describe
> that directly, so explain the hardware. Look at other examples.
I will fix it.
>
>> + memory-to-memory, memory-to-peripheral, or peripheral-to-memory data transfer
>> + capable of supporting 10 channels, implemented in Nuvoton MA35D1 SoCs.
>> +
>> +maintainers:
>> + - Shan-Chun Hung <shanchun1218@gmail.com>
>> +
>> +allOf:
>> + - $ref: dma-controller.yaml#
>> +
>> +properties:
>> + compatible:
>> + const: nuvoton,ma35d1-pdma
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + clocks:
>> + maxItems: 1
>> +
>> + interrupts:
>> + maxItems: 1
>> +
>> + "#dma-cells":
>> + const: 2
>> + description:
>> + The first cell is the channel number. The second cell is the
>> + peripheral request source (REQSRC) selection, which defines which
>> + peripheral is connected to that PDMA channel.
>> +
>> + dma-channels:
>> + const: 10
>
> Why isn't this implied by the compatible? Drop.
I will remove it.
>
>> +
>> +additionalProperties: false
>
> This goes after required block.
I will fix it.>
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - clocks
>> + - interrupts
>> + - "#dma-cells"
>> + - dma-channels
>> +
>> +examples:
>> + - |
>> + #include <dt-bindings/interrupt-controller/arm-gic.h>
>> + #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
>> +
>> + soc {
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> +
>> + dma-controller@40080000 {
>> + compatible = "nuvoton,ma35d1-pdma";
>> + reg = <0x0 0x40080000 0x0 0x2000>;
>> + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clk PDMA0_GATE>;
>> + #dma-cells = <2>;
>> + dma-channels = <10>;
>> + };
>> + };
>> +
>> +...
>> diff --git a/include/dt-bindings/dma/ma35d1-pdma.h b/include/dt-bindings/dma/ma35d1-pdma.h
>> new file mode 100644
>> index 000000000000..0ddc99d29661
>> --- /dev/null
>> +++ b/include/dt-bindings/dma/ma35d1-pdma.h
>
> Filename must match the binding filename.
I will fix it>
>> @@ -0,0 +1,113 @@
>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
>> +/*
>> + * Copyright (C) 2026 Nuvoton Technology Corp.
>> + */
>> +
>> +#ifndef __DT_BINDINGS_DMA_MA35D1_PDMA_H__
>> +#define __DT_BINDINGS_DMA_MA35D1_PDMA_H__
>> +
>> +#define MA35D1_PDMA_MEM 0
>
>
> Hole
>
>> +#define MA35D1_PDMA_UART0_TX 4
>> +#define MA35D1_PDMA_UART0_RX 5
>> +#define MA35D1_PDMA_UART1_TX 6
>> +#define MA35D1_PDMA_UART1_RX 7
>> +#define MA35D1_PDMA_UART2_TX 8
>> +#define MA35D1_PDMA_UART2_RX 9
>> +#define MA35D1_PDMA_UART3_TX 10
>> +#define MA35D1_PDMA_UART3_RX 11
>> +#define MA35D1_PDMA_UART4_TX 12
>> +#define MA35D1_PDMA_UART4_RX 13
>> +#define MA35D1_PDMA_UART5_TX 14
>> +#define MA35D1_PDMA_UART5_RX 15
>> +#define MA35D1_PDMA_UART6_TX 16
>> +#define MA35D1_PDMA_UART6_RX 17
>> +#define MA35D1_PDMA_UART7_TX 18
>> +#define MA35D1_PDMA_UART7_RX 19
>> +#define MA35D1_PDMA_UART8_TX 20
>> +#define MA35D1_PDMA_UART8_RX 21
>> +#define MA35D1_PDMA_UART9_TX 22
>> +#define MA35D1_PDMA_UART9_RX 23
>> +#define MA35D1_PDMA_UART10_TX 24
>> +#define MA35D1_PDMA_UART10_RX 25
>> +#define MA35D1_PDMA_UART11_TX 26
>> +#define MA35D1_PDMA_UART11_RX 27
>> +#define MA35D1_PDMA_UART12_TX 28
>> +#define MA35D1_PDMA_UART12_RX 29
>> +#define MA35D1_PDMA_UART13_TX 30
>> +#define MA35D1_PDMA_UART13_RX 31
>> +#define MA35D1_PDMA_UART14_TX 32
>> +#define MA35D1_PDMA_UART14_RX 33
>> +#define MA35D1_PDMA_UART15_TX 34
>> +#define MA35D1_PDMA_UART15_RX 35
>> +#define MA35D1_PDMA_UART16_TX 36
>> +#define MA35D1_PDMA_UART16_RX 37
>> +#define MA35D1_PDMA_QSPI0_TX 54
>
> You should not have holes in the ABI or this is not DT ABI, so drop or
> move out entire file from bindings.
I will fix it.>
> Best regards,
> Krzysztof
Best Regards,
Shan-Chun
next prev parent reply other threads:[~2026-11-05 0:14 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-03 2:22 [PATCH 0/2] dmaengine: ma35d1-pdma: Add MA35D1 PDMA driver Shan-Chun Hung
2026-11-03 2:22 ` [PATCH 1/2] dt-bindings: dma: nuvoton,ma35d1-pdma: Document MA35D1 PDMA controller Shan-Chun Hung
2026-11-04 14:03 ` Krzysztof Kozlowski
2026-11-05 0:14 ` Shan-Chun Hung [this message]
2026-11-03 2:22 ` [PATCH 2/2] dmaengine: ma35d1-pdma: Add MA35D1 PDMA driver Shan-Chun Hung
2026-11-04 14:06 ` Krzysztof Kozlowski
2026-11-05 4:11 ` Shan-Chun Hung
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=0093d120-b966-4ece-be57-55a4751e17be@gmail.com \
--to=shanchun1218@gmail.com \
--cc=Frank.Li@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dmaengine@vger.kernel.org \
--cc=gustavoars@kernel.org \
--cc=kees@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=krzk@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-hardening@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=robh@kernel.org \
--cc=schung@nuvoton.com \
--cc=vkoul@kernel.org \
--cc=ychuang3@nuvoton.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®