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Fri, 20 Feb 2026 06:28:32 -0800 (PST) X-Received: by 2002:a17:903:41c6:b0:2aa:e9f0:146c with SMTP id d9443c01a7336-2ad5f7b9775mr64575875ad.29.1771597711850; Fri, 20 Feb 2026 06:28:31 -0800 (PST) Received: from [192.168.0.195] ([49.204.27.241]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ad1a73b0fesm195782515ad.38.2026.02.20.06.28.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 20 Feb 2026 06:28:31 -0800 (PST) Message-ID: <00a1e492-1235-4dfe-ba0c-b1cb7c43ae22@oss.qualcomm.com> Date: Fri, 20 Feb 2026 19:58:25 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] arm64: dts: qcom: sm8750: Add camera clock controller To: Konrad Dybcio , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa References: <20260220-sm8750_camcc_dt-v2-1-e4b7faf35854@oss.qualcomm.com> <13553877-a4d0-47ad-88ce-3d4d5b353101@oss.qualcomm.com> Content-Language: en-US From: Taniya Das In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjIwMDEyNiBTYWx0ZWRfXw/c0gI6IwjZa SYz/Ov/zYpdskuSWq90Ir9VDk86c7wMxZg5Qf9pjccNz9U0CCphq2VSBnH0iowIlH7EFxXQFgnT Qhf9GHR/hlDxdhSMXr7Zp3Ibbt5uxN/cPG+2v9VqEa3B/FFzkb5IMK37s5Y0hK5CnwkNP3Lx9wv O1pK55m+RxjxwCZowKtJt+OBCg6DvPnlW4RITywEynZrAlVmecYnfXMUmMpJz8KxKgtg7KIeIZg AFnSNLkS+GAgq7aOUmEIwrrgVD4kPZQVCud9X3+7xUkdoHQvorSDwOzp4BjMvHxGXoSQEGYp4SO wKW+TThusfag/orT00uT2h1aKV7x/PfqXjtU/ge6NurCILLtLN/5OY3ZEb6bxJgn0+NTOmxGt6J v/4TcDqpFepxc0FLn0XWrnU1Lagt0k/IqAdBMgiKjx3B5V+xB7rEMzwwTqL3kdK/u8CQG0tbh1M NSd+k/ABlltWcMTka8w== X-Proofpoint-ORIG-GUID: CDLvzcsdsPZlykbbfjukZGQ9H27SqJIw X-Authority-Analysis: v=2.4 cv=K6Ev3iWI c=1 sm=1 tr=0 ts=69986f91 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=Zk7Ki20fgETz0Ru4rw8ykQ==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=EUspDBNiAAAA:8 a=JSsU4YdMWw5dEmU7CcUA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-GUID: CDLvzcsdsPZlykbbfjukZGQ9H27SqJIw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-20_01,2026-02-20_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 suspectscore=0 adultscore=0 spamscore=0 malwarescore=0 clxscore=1015 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602200126 On 2/20/2026 7:55 PM, Konrad Dybcio wrote: > On 2/20/26 3:23 PM, Taniya Das wrote: >> >> >> On 2/20/2026 4:25 PM, Konrad Dybcio wrote: >>> On 2/20/26 11:28 AM, Taniya Das wrote: >>>> The camera clock controller is split into cambistmclk and camcc. The >>>> cambist clock controller handles the mclks and the rest of the clocks of >>>> camera are part of the camcc clock controller. >>>> Add the camcc clock controller device node for SM8750 SoC. >>>> >>>> Reviewed-by: Abel Vesa >>>> Signed-off-by: Taniya Das >>>> --- >>>> Changes in v2: >>>> - Update the MxC phandle to use MX for camcc node. >>> >>> My point was that both MXC and MXA are used >>> >> >> My bad, even I think I got confused with this. We really do not need MxA >> voting as it is always ON. We can sustain with MxC only. > > Does that mean we don't even need any particular RPMH level on MxA > for this usecase, just for it to be on (which as you said it always is)? Particularly for this usecase you do not need. -- Thanks, Taniya Das