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Wed, 12 Nov 2025 01:21:16 -0800 (PST) Message-ID: <013215bb-3562-484f-868d-485d0da095d8@linaro.org> Date: Wed, 12 Nov 2025 11:21:15 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 5/5] mtd: spi-nor: micron-st: add comment for mt35xu02gcba To: Haibo Chen , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev References: <20251112-nor-v3-0-20aaff727c7d@nxp.com> <20251112-nor-v3-5-20aaff727c7d@nxp.com> Content-Language: en-US From: Tudor Ambarus In-Reply-To: <20251112-nor-v3-5-20aaff727c7d@nxp.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 11/12/25 8:48 AM, Haibo Chen wrote: > mt35xu02gcba is similar with mt35xu01gbba, but with four > dies inside. According to datasheet, it contain SFDP and > support 8D-8D-8D mode. Add comments here, remider to change > the code in future if has a chance to test on this chip. you'll need to rephrase a bit the above> > Link: https://datasheet.octopart.com/MT35XU02GCBA1G12-0AAT-Micron-datasheet-138896808.pdf > Signed-off-by: Haibo Chen > --- > drivers/mtd/spi-nor/micron-st.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c > index 6d081ec176c37249e5ddb724b61bd70f68088163..cc053b4d615ade3f12068618f8355779561dce55 100644 > --- a/drivers/mtd/spi-nor/micron-st.c > +++ b/drivers/mtd/spi-nor/micron-st.c > @@ -206,6 +206,12 @@ static const struct flash_info micron_nor_parts[] = { > .fixup_flags = SPI_NOR_IO_MODE_EN_VOLATILE, > .fixups = &mt35xu01gbba_fixups, > }, { > + /* > + * MT35XU02GCBA contain SFDP, so no need the size > + * and no_sfdp_flags here, should similar with this is expected for all the flashes that have SFDP, so no need to specify this again here. > + * MT35XU01GBBA, but with 4 dies. If someone can > + * test on this chip, can change accordingly. > + */ How about we rephrase this to: The MT35XU02GCBA flash device does not support chip erase, according to its datasheet. It only supports die erase, which means the current driver implementation will likely need to be converted to use die erase. Furthermore, similar to the MT35XU01GBBA, the SPI_NOR_IO_MODE_EN_VOLATILE flag probably needs to be enabled. With something along the above lines you can add: Reviewed-by: Tudor Ambarus > .id = SNOR_ID(0x2c, 0x5b, 0x1c), > .name = "mt35xu02g", > .sector_size = SZ_128K, >