RE: [PATCH 10/10] pinctrl: realtek: rtd1625: Set dcycle_offset to NA for pins without duty-cycle support

["Yu-Chun Lin [林祐君]" <eleanor.lin@realtek.com>]

 > In rtd1625_main2_sconfigs[], pins gpio_86 through gpio_91 do not support
> clock duty-cycle adjustment (dcycle_maskbits is 0), but specify 0 instead of NA
> for dcycle_offset.  Because rtd_pconf_parse_conf() tests
> sconfig_desc->dcycle_offset == NA to determine whether duty-cycle
> configuration is supported, an offset of 0 causes it to compute
> GENMASK(0 - 1, 0) and corrupt the pad control register.
> 
> Set dcycle_offset to NA for gpio_86 through gpio_91.
> 
> Fixes: e309dbd523b8 ("pinctrl: realtek: add rtd1625 pinctrl driver")
> Closes:
> https://sashiko.dev/#/bug/linux-8a8f690f-15e7-4dbd-a3a2-87bc00edf7b9
> Cc: stable@vger.kernel.org
> Signed-off-by: Lee Jones <lee@kernel.org>

Thanks for the patch!

Reviewed-by: Yu-Chun Lin <eleanor.lin@realtek.com>

> ---
>  drivers/pinctrl/realtek/pinctrl-rtd1625.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/pinctrl/realtek/pinctrl-rtd1625.c
> b/drivers/pinctrl/realtek/pinctrl-rtd1625.c
> index 88f2be37f743..f6e038e4bbdd 100644
> --- a/drivers/pinctrl/realtek/pinctrl-rtd1625.c
> +++ b/drivers/pinctrl/realtek/pinctrl-rtd1625.c
> @@ -2993,12 +2993,12 @@ static const struct rtd_pin_sconfig_desc
> rtd1625_main2_sconfigs[] = {
>         RTK_PIN_SCONFIG(gpio_65, 0x34, 16, 3, 19, 3, 22, 3),
>         RTK_PIN_SCONFIG(gpio_66, 0x38, 3, 3, 6, 3, 9, 3),
>         RTK_PIN_SCONFIG(gpio_67, 0x38, 16, 3, 19, 3, 22, 3),
> -       RTK_PIN_SCONFIG(gpio_86, 0x3c, 0, 0, 14, 4, 18, 4),
> -       RTK_PIN_SCONFIG(gpio_87, 0x3c, 0, 0, 24, 4, 28, 4),
> -       RTK_PIN_SCONFIG(gpio_88, 0x40, 0, 0, 2, 4, 6, 4),
> -       RTK_PIN_SCONFIG(gpio_89, 0x40, 0, 0, 12, 4, 16, 4),
> -       RTK_PIN_SCONFIG(gpio_90, 0x40, 0, 0, 22, 4, 26, 4),
> -       RTK_PIN_SCONFIG(gpio_91, 0x44, 0, 0, 2, 4, 6, 4),
> +       RTK_PIN_SCONFIG(gpio_86, 0x3c, NA, 0, 14, 4, 18, 4),
> +       RTK_PIN_SCONFIG(gpio_87, 0x3c, NA, 0, 24, 4, 28, 4),
> +       RTK_PIN_SCONFIG(gpio_88, 0x40, NA, 0, 2, 4, 6, 4),
> +       RTK_PIN_SCONFIG(gpio_89, 0x40, NA, 0, 12, 4, 16, 4),
> +       RTK_PIN_SCONFIG(gpio_90, 0x40, NA, 0, 22, 4, 26, 4),
> +       RTK_PIN_SCONFIG(gpio_91, 0x44, NA, 0, 2, 4, 6, 4),
>         RTK_PIN_SCONFIG(hif_clk, 0x44, 13, 3, 16, 3, 19, 3),
>         RTK_PIN_SCONFIG(hif_data, 0x48, 3, 3, 6, 3, 9, 3),
>         RTK_PIN_SCONFIG(hif_en, 0x48, 16, 3, 19, 3, 22, 3),
> --
> 2.56.0.567.gdb80ae8cd5-goog