From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C58A42E54CC; Thu, 12 Feb 2026 09:57:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770890280; cv=none; b=XSUTfTledQxO6YyZPmVVntYA5ciyFAk7GH9Z5ab5FfyRtFZPJio8BFxppK1Z+8NcYRUr8xay5cVGDwdHPe1KxTo/cV5nOZODsVIJW1IJGXTDrEh1nSkKJZcWQqpTxcJ7Qpy2DiTL2+yRgNr2wEZaNy+aagt4bRoC3ILohD9Xd54= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770890280; c=relaxed/simple; bh=iI/SDCfh9dwezKTtvQ5Eybbk3cWcaOxqf8BgHUVGu8o=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=YvcX49apzOj0Se3VIfcS8kbQlp+Okeh+NWrE+K60IKvbMrTPspH+6DOIXbV7JfOKK1lvt6mUfxXEO/TnjgglzpMWK7F5khQ1vuygiq1uvlntPWyii3csiphulSWAs9GAnetiCcqkJqsgTLGOFo4ERyqA+WeO3Q52li3VjPIW/4o= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=Qx7j6msv; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="Qx7j6msv" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1770890277; bh=iI/SDCfh9dwezKTtvQ5Eybbk3cWcaOxqf8BgHUVGu8o=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Qx7j6msvSlwIPvhIdnaGJURYQJkiClQGtAQfeUMjbThdUhwbtD9koTFe30N5bQIdI FfIWh7nHzqo4b6RTawfBl4XbzBXO7IlCFn9K91gB03B4F+oTBpVfcD7P/7Bhvs5h5r 1Io7K5e/NB+IfMj3SMejAhjBQV+qSb3CQBW8b/+VfhMep11NCKOU1fQbYgi72ydSLY SY+ebUYoCvIlL3FbRcV0wHnbjoDQMM1SBZPwQfUlMYpe85yXmIqofgRx8151AmQb1E yqrXotGuKvxk8Rwb5DY6jC3bYANmqGMlbuahyp60zjeZV+jg5TdiMLly2mFtkRgV01 /qihAKdQ/E9dw== Received: from [192.168.1.100] (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: kholk11) by bali.collaboradmins.com (Postfix) with ESMTPSA id 93A7917E1305; Thu, 12 Feb 2026 10:57:56 +0100 (CET) Message-ID: <01682ecb-b3bc-41de-94e0-83271ba121a4@collabora.com> Date: Thu, 12 Feb 2026 10:57:56 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 6/7] arm64: dts: mt8167: Add the mmsys reset bit to reset dsi To: Luca Leonardo Scorcia , linux-mediatek@lists.infradead.org Cc: Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , Philipp Zabel , linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <72dcec7fe8bfd8ee7e8ef58708690268f3c07d42.1770836190.git.l.scorcia@gmail.com> From: AngeloGioacchino Del Regno Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Il 12/02/26 09:01, Luca Leonardo Scorcia ha scritto: > I apologize for the mistake, I did not notice that the dsi node is not > present upstream yet, so this specific patch won't apply. Any comments > are appreciated though! > I will send a separate patch to add the display nodes to the dts and > the required compatibles to the bindings. > Initially, I didn't notice either. P.S.: resets goes after phy (alphabetical order) Cheers > Il giorno mer 11 feb 2026 alle ore 20:06 Luca Leonardo Scorcia > ha scritto: >> >> DSI hardware reset is needed to prevent different settings between >> the bootloader and the kernel. >> >> Signed-off-by: Luca Leonardo Scorcia >> --- >> arch/arm64/boot/dts/mediatek/mt8167.dtsi | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/mediatek/mt8167.dtsi b/arch/arm64/boot/dts/mediatek/mt8167.dtsi >> index caf51f203dd3..ee2792d53b2c 100644 >> --- a/arch/arm64/boot/dts/mediatek/mt8167.dtsi >> +++ b/arch/arm64/boot/dts/mediatek/mt8167.dtsi >> @@ -8,6 +8,7 @@ >> #include >> #include >> #include >> +#include >> >> #include "mt8167-pinfunc.h" >> >> @@ -189,6 +190,7 @@ dsi: dsi@14012000 { >> <&mmsys CLK_MM_DSI_DIGITAL>, >> <&mipi_tx>; >> clock-names = "engine", "digital", "hs"; >> + resets = <&mmsys MT8167_MMSYS_SW0_RST_B_DISP_DSI0>; >> phys = <&mipi_tx>; >> phy-names = "dphy"; >> status = "disabled"; >> @@ -295,6 +297,7 @@ mmsys: syscon@14000000 { >> compatible = "mediatek,mt8167-mmsys", "syscon"; >> reg = <0 0x14000000 0 0x1000>; >> #clock-cells = <1>; >> + #reset-cells = <1>; >> }; >> >> smi_common: smi@14017000 { >> -- >> 2.43.0 >> > >