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From: Andrew Lunn <andrew@lunn.ch>
To: Daniel Golle <daniel@makrotopia.org>
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>,
	hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net,
	edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
	sander@svanheule.net, markus.stockhausen@gmx.de,
	linux-kernel@vger.kernel.org, netdev@vger.kernel.org
Subject: Re: [PATCH net-next v9] net: mdio: Add RTL9300 MDIO driver
Date: Mon, 10 Mar 2025 17:27:26 +0100	[thread overview]
Message-ID: <017c73d1-621b-4c75-85eb-80f0a98fd304@lunn.ch> (raw)
In-Reply-To: <Z85A9_Li_4n9vcEG@pidgin.makrotopia.org>

> Using "raw" access to the PHY and thereby bypassing the MDIO
> controller's support for hardware-assisted page access is problematic.
> The MDIO controller also polls all PHYs status in hardware and hence
> be aware of the currently selected page.

It would be simplest to just disable this hardware polling.

> https://git.openwrt.org/?p=openwrt/openwrt.git;a=blob;f=target/linux/realtek/files-6.6/drivers/net/ethernet/rtl838x_eth.c;h=4b79090696e341ed1e432a7ec5c0f7f92776f0e1;hb=HEAD#l1631

The comment says:

1639                                               Having the MAC link settings automatically
1640  * follow the PHY link status also happens to be the only way to control MAC port status
1641  * in a meaningful way, or at least it's the only way we fully understand, as this is
1642  * what every vendor firmware is doing.

Could you expand on this. How does phylink work on this device, where
it expects to the configuring the MAC? How does this work for a C45
PHY which is Chris's use case?

I think we first need to understand the restrictions with the MAC
configuration before we can decided how this should all work.

	Andrew

  parent reply	other threads:[~2025-03-10 16:27 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-09 23:25 Chris Packham
2025-03-10  1:31 ` Daniel Golle
2025-03-10  2:07   ` Chris Packham
2025-03-10 15:28     ` Daniel Golle
2025-03-13  1:04       ` Chris Packham
2025-03-13 13:05         ` Andrew Lunn
2025-03-10 16:32     ` Andrew Lunn
2025-03-10 16:34     ` Russell King (Oracle)
2025-03-10 16:27   ` Andrew Lunn [this message]
2025-03-10 18:06 ` Christophe JAILLET
2025-03-10 18:15   ` Russell King (Oracle)

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