Re: e100 latency, cpu cycle saver and e1000...

["Paul Rolland" <rol@as2917.net>]

Hello,

> One thing you can do to reduce packet handling latency (at 
> the cost of 
> CPU) with both the e1000 is drop down the RX Delay Interrupt 
> timers, ditto 
> for the Tx Delay. The hardware delays in increments of 1.024ms
> 
That's right, though the driver is not exhibiting a R/W /proc interface,
which probably means I'll have to reboot the server.

However, what I'm trying to figure out is : why did this latency 
change suddenly, if it can't be related to a CPU Cycle Saver, as
the code doesn't seem to contain something that would allow a dynamic
change of such a parameter on a running machine...

Of course, the problem may be completely unrelated to the NIC,
my initial question being : is there a CPU Cycle Saver on the e1000
as there is one on the e100... ;-)

Regards,
Paul