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Fri, 23 Oct 2026 02:59:44 -0700 (PDT) Received: from [10.217.217.64] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-369d9d5ea64sm7499288eec.5.2026.10.23.02.59.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 23 Oct 2026 02:59:43 -0700 (PDT) Message-ID: <01b1b1bd-2848-482e-af8b-8fab037c7a04@oss.qualcomm.com> Date: Fri, 23 Oct 2026 15:29:35 +0530 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 02/16] arm64: ras: Add probe/remove for arm64_ras driver To: Ruidong Tian , Catalin Marinas , Will Deacon , Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , "Rafael J . Wysocki" , Len Brown , Tony Luck , Borislav Petkov , Thomas Gleixner , Peter Zijlstra , Robin Murphy Cc: linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org, zhuo.song@linux.alibaba.com, oliver.yang@linux.alibaba.com References: <20260602071540.3711528-1-tianruidong@linux.alibaba.com> <20260602071540.3711528-3-tianruidong@linux.alibaba.com> Content-Language: en-US From: Umang Chheda In-Reply-To: <20260602071540.3711528-3-tianruidong@linux.alibaba.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=cZpHPXDM c=1 sm=1 tr=0 ts=6adb3012 cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=SRrdq9N9AAAA:8 a=49fVXzMj59YXLoLGRmgA:9 a=QEXdDO2ut3YA:10 a=bBxd6f-gb0O0v-kibOvt:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIzMDAzOSBTYWx0ZWRfXybN94rN3czhO RC3HO8xzmyj7CQQXYEbmNWUDPn3MognK7WTlrohLzoH/wlZg9h/vT4MsM0ZgDDqlbBXeGZmbsUv 4YKotiHuGFC6dKB7gSgxVV6+vJYtjYM= X-Proofpoint-GUID: 7f5j7N3RZ4x77TqBsPzqKFXFKTZZ9vRJ X-Proofpoint-ORIG-GUID: 7f5j7N3RZ4x77TqBsPzqKFXFKTZZ9vRJ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIzMDAzOSBTYWx0ZWRfX7KORQXhEcsQX tiIQZo+lOHxNxUMUqCG8tY6R5JXJpVgu4lja9mJLG31lxIJajgf/qHohvHyY20mOrwf7IlETkuP V94ZP2wu+P9KDmGFytn0I5EeudSYqelVgOJrEwaVeVzF0fdwhd8qmJNDwsZ5ewZe1HFn915A4aj yVsN4asCuTUIcjgb+/8q4bUybmLdmcEM5ZhY+12p/VTcfTUr3FmYbr3Ud1wNVxHA/A7RvQ9nEzG b87r4cFnVP0qti6FER0Ka6ONlfPiBRp8zh4HL3Yt8ohzxZT+fzy71jv91kSRRv/6ApLjaZmaR9t 1Gbmv9eaGueADUTfteTgkID6mdBmCo1g7YRrJ6MlN7a8ir2Sk5c1riUxdbEJEBj6Bd2EIlrn/ZZ IWxobUZvev2zJLdtBNdOFms/LAJzBqa0/Ec8FdZmSopumG07D4bLA7gdWeDyIoMhuIvdPHpOA4D QRNsBxgKZLMhkX9liNQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-23_02,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 malwarescore=0 adultscore=0 priorityscore=1501 clxscore=1015 spamscore=0 lowpriorityscore=0 impostorscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610230039 Hello Ruidong, On 6/2/2026 12:45 PM, Ruidong Tian wrote: > Introduce the back-end platform driver that binds to the devices > created by the AEST front-end. Driver input is taken exclusively from > fwnode properties, so the same probe path serves any future front-end > (DT, hand-rolled) without conditional code. > > The probe builds two layers of state: > > - struct ras_node: one AEST error source > - struct ras_record: one error record inside a node > > This split mirrors the hardware: a node owns the shared MMIO/ERRGSR > window and policy, while records are the unit at which errors are > reported, masked and polled. Later patches plug interrupts, decoding, > storm mitigation and userspace ABI onto these two objects without > touching the front-end. > > Signed-off-by: Umang Chheda > Signed-off-by: Ruidong Tian > --- [...] > +# SPDX-License-Identifier: GPL-2.0-only > + > +obj-$(CONFIG_ARM64_RAS_DRIVER) += arm64_ras.o > + > +arm64_ras-y := ras-core.o > diff --git a/drivers/ras/arm64/ras-core.c b/drivers/ras/arm64/ras-core.c > new file mode 100644 > index 000000000000..b5448f4a841f > --- /dev/null > +++ b/drivers/ras/arm64/ras-core.c > @@ -0,0 +1,266 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * ARM Error Source Table Support > + * > + * Copyright (c) 2025, Alibaba Group. > + */ > + > +#include > +#include > +#include > + > +#include "ras.h" > + > +#undef pr_fmt > +#define pr_fmt(fmt) "arm64_ras: " fmt > + > +static const char *const ras_node_name[] = { > + [ACPI_AEST_PROCESSOR_ERROR_NODE] = "processor", > + [ACPI_AEST_MEMORY_ERROR_NODE] = "memory", > + [ACPI_AEST_SMMU_ERROR_NODE] = "smmu", > + [ACPI_AEST_VENDOR_ERROR_NODE] = "vendor", > + [ACPI_AEST_GIC_ERROR_NODE] = "gic", > + [ACPI_AEST_PCIE_ERROR_NODE] = "pcie", > + [ACPI_AEST_PROXY_ERROR_NODE] = "proxy", > +}; Now that the ARM RAS core framework is shared by both ACPI and DT platforms, should we consider dropping the "ACPI_AEST" naming in the common code and replacing it with a more generic prefix maybe something like "ARM_RAS" ? [...] > + > +const struct ras_group ras_group_config[] = { > + [ACPI_AEST_NODE_GROUP_FORMAT_4K] = { > + .errgsr_num = ERXGROUP_4K_ERRGSR_NUM, > + .size = ERXGROUP_4K_SIZE, > + .errgsr_offset = ERXGROUP_4K_OFFSET, > + }, > + [ACPI_AEST_NODE_GROUP_FORMAT_16K] = { > + .errgsr_num = ERXGROUP_16K_ERRGSR_NUM, > + .size = ERXGROUP_16K_SIZE, > + .errgsr_offset = ERXGROUP_16K_OFFSET, > + }, > + [ACPI_AEST_NODE_GROUP_FORMAT_64K] = { > + .errgsr_num = ERXGROUP_64K_ERRGSR_NUM, > + .size = ERXGROUP_64K_SIZE, > + .errgsr_offset = ERXGROUP_64K_OFFSET, > + }, > +}; > + Thanks, Umang